r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 82

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21368sdfp#V0
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 6.5
6.3.3
When the RESET pin is connected to the VCC pin via a resistor and the VCC pin voltage level rises, the power-
on reset is activated and the CPU, SFRs, and I/O ports are initialized. The internal RAM values will be
undefined. In addition, when a capacitor is connected to the RESET pin, ensure that the voltage applied to the
RESET pin is always 0.8 VCC or more.
When the voltage applied to the VCC pin reaches Vdet0 or above, the low-speed on-chip oscillator clock count
starts. When the low-speed on-chip oscillator clock count reaches 32, the internal reset signal goes high and the
MCU proceeds to the reset sequence (refer to Figure 6.2). The low-speed on-chip oscillator clock with no
division is automatically selected as the CPU clock after a reset.
For the states of the SFRs after a reset, refer to 3.2 Special Function Registers (SFRs).
To use the power-on reset, set the LVDAS bit in the OFS register to 0 (voltage monitor 0 reset enabled) and
enable the voltage monitor 0 reset.
Figure 6.5 shows the Power-On Reset Circuit Example and Operation.
Notes:
1. Vdet0 indicates the voltage detection level of the voltage detection 0 circuit. Refer to the Voltage
2. tw(por) is the time required for a power-on reset to be enabled while the external power VCC is being held
3. To use the power-on reset, enable the voltage monitor 0 reset by setting the LVDAS bit in the OFS register
Power-On Reset
Detection Circuit chapter for details.
below the valid voltage (0.5 V).
When VCC falls with voltage monitor 0 reset disabled and then turns on, maintain tw(por) for 1 ms or more.
to 0.
Preliminary document
Specifications in this document are tentative and subject to change.
Power-On Reset Circuit Example and Operation
External power VCC
Internal reset signal
(reference)
Vdet0
0.5 V
4.7 k
(1)
(Note 2)
t
w(por)
VCC
RESET
fLOCO
1
 32
Page 51 of 725
6. Resets

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