r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 549

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
22. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RJ and UART0.
The hardware LIN consists of a channel: HW-LIN_0.
This chapter describes these channels as LIN unless there are differences among them.
22.1
Figure 22.1
RXD pin
TXD pin
The hardware LIN has the features listed below.
Figure 22.1 shows the Hardware LIN Block Diagram.
The wake-up function for each mode is detected using INTx (x = 1 or 2).
[Master mode]
• Synch Break generation
• Bus collision detection
[Slave mode]
• Synch Break detection
• Synch Field measurement
• Control function for Synch Break and Synch Field signal inputs to UART
• Bus collision detection
Overview
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: Bits in LINCT register
TIOSEL: Bit in TRJIOC register
TE: Bit in U0C1 register
Hardware LIN
Preliminary document
Specifications in this document are tentative and subject to change.
Hardware LIN Block Diagram
LSTART
SBE
LNE
RXD input
control
circuit
Synch Field
control
circuit
TOSEL = 0
TOSEL = 1
Bus collision
detection
circuit
MST
BCE, SBE, and
RXD data
Interrupt
control
circuit
SFE
UART0 transmit enable bit
Timer RJ output pulse
UART0 transfer clock
UART0 TXD data
underflow signal
Timer RJ
Timer RJ
UART0
22. Hardware LIN
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Timer RJ
interrupt