r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 394

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r5f21368sdfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 18.17
18.3.6
When reset adjustment occurs while the BSY bit in the TRESEC register = 0
When reset adjustment occurs while the BSY bit in the TRESEC register = 1
18.3.6.1
TRESEC + TREMIN
TRESEC + TREMIN
Two functions are provided as the second adjustment functions: reset adjustment and 30-second adjustment.
The reset adjustment function initializes the TRESEC register and the internal counter. When 1 is written to the
RSTADJ bit in the TREIFR register while the BSY bit in the TRESEC register is 0 (data not being updated), the
TRESEC register is set to 00h after two or three cycles of the fC1 clock, and the internal counter is initialized
and the count restarts. When 1 is written to the RSTADJ bit while the BSY bit is 1 (data is being updated), the
TRESEC register is set to 00h when the data is updated, and the internal counter is initialized and the count
restarts.
The other timer RE2 data registers are not affected during reset adjustment. After writing 1 to the RSTADJ bit,
allow four cycles of the fC1 clock to elapse before writing to the TRESEC register.
TRESEC register
TRESEC register
TREIFR register
TREIFR register
Internal counter
Internal counter
RSTADJ bit in
RSTADJ bit in
Second Adjustment Function
BSY bit in
BSY bit in
Registers
Registers
Preliminary document
Specifications in this document are tentative and subject to change.
Reset Adjustment Function
Occurrence of Reset Adjustment
03 min 47 s
TRESEC register is set to 00h
Reset adjustment operation
Count operation
Count operation
03 min 48 s
Internal counter is initialized and restarts
03 min 48 s
TRESEC register is set to 00h,
Reset adjustment operation
Internal counter is initialized
and restarts
2 or 3 cycles of fC1 clock
03 min 00 s
03 min 00 s
Initialized and count restarts
Initialized and count restarts
1 s
1 s
BSY calculation result
BSY calculation result
TRESEC register + 1
TRESEC register + 1
Page 363 of 725
03 min 01 s
03 min 01 s
18. Timer RE2

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