r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 557

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 22.6
Timer RJ Set to pulse width measurement mode
Timer RJ Set the pulse width measurement level to low
Timer RJ Assign the TRJIO_0 pin to the corresponding port
UART0
INTx
Timer RJ Set the count source (f1, f2, f8, or fOCO)
Timer RJ Set the Synch Break width
Hardware LIN
Hardware LIN
Hardware LIN
Hardware LIN
Hardware LIN
Notes:
1. When the previous communication completes normally and header field reception is
2. Although the timer-associated registers (TRJMR and TRJIOC) are set before the TRJ_0SR
(After Synch Break detection or after Synch Field measurement)
SBE bit in LINCT register
(Bus collision detection, Synch Break detection, Synch Field measurement)
Bits BCIE, SBIE, and SFIE in LINCT register
performed again with the same settings, these settings can be omitted.
register is set, there is no problem with this flow for the hardware LIN.
Setting of bits TRJIO_0SEL0 to TRJIO_0SEL2 in the TRJ_0SR register
Assign the RXD_i pin to the corresponding port
Setting of the RXD_0SEL bit in the U_0SR register
or bits RXD_1SEL0 and RXD_1SEL1 in the U_1SR register
Assign the INTx pin to the corresponding port
Setting of the INTSR0 register
Bits TMOD2 to TMOD0 in TRJMR register  011b
TEDGSEL bit in TRJIOC register  0
Bits TCK0 to TCK2 in TRJMR register
TRJ register
Preliminary document
Specifications in this document are tentative and subject to change.
Header Field Reception Flowchart Example (1) (i = 0 or 1, x = 1 or 2)
Set the LIN operation to stop
LINE bit in LINCT register  0
Set to slave mode
MST bit in LINCT register  0
Set the LIN operation to start
LINE bit in LINCT register  1
Set the RXD input unmasking timing
Set interrupts to enabled
A
(1, 2)
(1, 2)
(1, 2)
(1)
(1)
(1)
(1)
(1)
(1)
Set the count source and
TRJ register as appropriate
for the Synch Break period.
Select the timing at which to
unmask the RXD input for
UART0.
If the RXD input is selected
to be unmasked after Synch
Break detection, the Synch
Field signal is also input to
UART.
Set the hardware LIN
function to be selected
(the TIOSEL bit in the
TRJIOC register to 1).
If the wakeup function
is not necessary, the
setting of the INTx pin
can be omitted.
22. Hardware LIN
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