r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 651

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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r5f21368sdfp#V0
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
26. Flash Memory
The flash memory can perform in the following three rewrite modes: CPU rewrite mode, standard serial I/O mode, and
parallel I/O mode.
26.1
Table 26.1
Notes:
Table 26.2
Flash memory operating modes
Division of erase blocks
Programming method
Erasure method
Programming and erasure control method
Rewrite protect
control method
Number of commands
Program and erase
endurance
ID code check function
ROM code protection
Function
Rewritable area
Rewrite programs
Table 26.1 lists the Flash Memory Performance (refer to Tables 1.1 to 1.3 R8C/36T-A Group Specifications for
items not listed in Table 26.1).
The R8C/36T-A Group has data flash (1 KB × 4 blocks) with background operation (BGO) function.
1. To perform programming and erasure, use VCC = 2.7 to 5.5 V as the supply voltage. Do not perform
2. The number of blocks and block division vary with the MCU. Refer to Figure 26.1 for details.
3. Definition of program and erase endurance
Flash Memory
Rewrite Mode
programming and erasure at less than 2.7 V.
The program and erase endurance is defined on a per-block basis. If the program and erase endurance is n (n
= 1,000 or 10,000), each block can be erased n times. For example, if 1,024 1-byte writes are performed to
different addresses in block A, a 1-Kbyte block, and then the block is erased, the program/erase endurance still
stands at one. When performing 100 or more rewrites, the actual erase count can be reduced by executing
program operations in such a way that all blank areas are used before performing an erase operation. Avoid
rewriting only particular blocks and try to average out the program and erase endurance of the blocks. It is also
advisable to retain data on the erase endurance of each block and limit the number of erase operations to a
certain number.
Overview
(3)
Preliminary document
Specifications in this document are tentative and subject to change.
Flash Memory Performance
Flash Memory Rewrite Mode
Item
Blocks 0 to 6
(Program ROM)
Blocks A, B, C, and D
(Data flash)
Blocks 0 to 10
(Program ROM)
Blocks A, B, C, and D
(Data flash)
User ROM area is rewritten by
executing software commands from
the CPU.
User ROM
User program
CPU Rewrite Mode
(2)
(2)
(1)
3 modes (CPU rewrite, standard serial I/O, and parallel I/O)
Refer to Figure 26.1 .
Byte units/word units (program ROM area only)
Block erase
Program and erase control by software commands
Rewrite protect control in block units by the lock bit
Individual rewrite protect control on blocks A, B, C, and D by bits
FMR14, FMR15, FMR16, and FMR17 in the FMR1 register
7 commands
1,000 times
10,000 times
Standard serial I/O mode supported
Parallel I/O mode supported
User ROM area is rewritten
using a dedicated serial
programmer.
User ROM
Standard boot program
Standard Serial I/O Mode
Specification
User ROM area is
rewritten using a
dedicated parallel
programmer.
User ROM
Parallel I/O Mode
26. Flash Memory
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