r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 245

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
14.5.18 Drive Capacity Control Register 0 (DRR0)
Note:
DRR00 Bit (P0_0 to P0_3 drive capacity)
DRR01 Bit (P0_4 to P0_7 drive capacity)
DRR06 Bit (P3_0 to P3_3 drive capacity)
DRR07 Bit (P3_4 to P3_7 drive capacity)
After Reset
1. Both high and low output are set to high drive capacity.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 002CCh
The set values in the DRR0 register are valid for pins used as output.
The DRR00 bit is used to select whether the drive capacity of the P0_0 to P0_3 output transistors is set to low or
high. This bit is used to select whether the drive capacity of the output transistors is set to low or high for four
pins.
The DRR01 bit is used to select whether the drive capacity of the P0_4 to P0_7 output transistors is set to low or
high. This bit is used to select whether the drive capacity of the output transistors is set to low or high for four
pins.
The DRR06 bit is used to select whether the drive capacity of the P3_0 to P3_3 output transistors is set to low or
high. This bit is used to select whether the drive capacity of the output transistors is set to low or high for four
pins.
The DRR07 bit is used to select whether the drive capacity of the P3_4 to P3_7 output transistors is set to low or
high. This bit is used to select whether the drive capacity of the output transistors is set to low or high for four
pins.
Symbol
Symbol
DRR00
DRR01
DRR06
DRR07
Bit
—
—
—
—
DRR07
Preliminary document
Specifications in this document are tentative and subject to change.
b7
0
P0_0 to P0_3 drive capacity
P0_4 to P0_7 drive capacity
Nothing is assigned. The write value must be 0. The read value is 0.
P3_0 to P3_3 drive capacity
P3_4 to P3_7 drive capacity
DRR06
b6
0
Bit Name
b5
—
0
b4
—
0
0: Low
1: High
0: Low
1: High
b3
—
0
(1)
(1)
b2
—
0
DRR01
Function
b1
0
DRR00
b0
0
Page 214 of 725
14. I/O Ports
R/W
R/W
R/W
R/W
R/W
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