MC9S12E256VPVE Freescale Semiconductor, MC9S12E256VPVE Datasheet - Page 100

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12E256VPVE

Manufacturer Part Number
MC9S12E256VPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12E256VPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256VPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.2.11
The banked FDATAHI and FDATALO registers are the Flash data registers.
All FDATAHI and FDATALO bits are readable but are not writable. After an array write as part of a
command write sequence, the FDATA registers will contain the data written. At the completion of a data
compress operation, the resulting 16-bit signature is stored in the FDATA registers. The data compression
signature is readable in the FDATA registers until a new command write sequence is started
2.3.2.12
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
2.3.2.13
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
100
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
Flash Data Registers (FDATA)
RESERVED1
RESERVED2
7
0
7
0
7
0
0
7
0
0
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
6
0
6
0
6
0
0
6
0
0
Figure 2-17. Flash Data Low Register (FDATALO)
Figure 2-16. Flash Data High Register (FDATAHI)
MC9S12E256 Data Sheet, Rev. 1.08
5
0
5
0
5
0
0
5
0
0
Figure 2-18. RESERVED1
Figure 2-19. RESERVED2
4
0
4
0
4
0
0
4
0
0
FDATALO
FDATAHI
3
0
3
0
3
0
0
3
0
0
2
0
2
0
2
0
0
2
0
0
Freescale Semiconductor
1
0
1
0
1
0
0
1
0
0
.
0
0
0
0
0
0
0
0
0
0

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