MC9S12E256VPVE Freescale Semiconductor, MC9S12E256VPVE Datasheet - Page 575

• Manufacturer Part Number: MC9S12E256VPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256VPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The loop bandwidth f
typical values are 50. = 0.9 ensures a good transient response.
And finally the frequency relationship is defined as
With the above values the resistance can be calculated. The example is shown for a loop bandwidth
f
The capacitance C
The capacitance C
A.3.3.2
The basic functionality of the PLL is shown in
deviation from the reference clock f
accordingly.The adjustment is done continuously with no abrupt changes in the clock output frequency.
Noise, voltage, temperature and other factors cause slight variations in the control loop resulting in a clock
jitter. This jitter affects the real minimum and maximum clock periods as illustrated in
Freescale Semiconductor
C
=10kHz:
Jitter Information
s
p
R
can now be calculated as:
should be chosen in the range of:
C
=
should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10,
2
---------------------------- -
C
s
K
=
n f
f
C
----------------------
2
<
C
C
f
------------------------------------------ -
C
n
s
ref
2
MC9S12E256 Data Sheet, Rev. 1.08
=
⎛
⎝
20
2
R
is measured and input voltage to the VCO is adjusted
f
-------------- -
+
VCO
= 2* *50*10kHz/(316.7Hz/ )=9.9k =~10k
f
ref
0.516
-------------- -
f
C
C
1
f
ref
p
+
R
=
;
Figure
C
2
2
⎞
⎠
s
=
10
----- -
10
synr
1
0.9
A-2. With each transition of the clock f
+
f
C
C
1
= 5.19nF =~ 4.7nF
p
f
<
C
= 470pF
------------- -
4 10
< 25kHz
f
ref
= 50
;
=
0.9
Appendix A Electrical Characteristics
Figure
cmp
A-3.
, the
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