MC9S12E256VPVE Freescale Semiconductor, MC9S12E256VPVE Datasheet - Page 503

• Manufacturer Part Number: MC9S12E256VPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256VPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.2
Most interfacing with the interrupt sub-block is done within the core. However, the interrupt does receive
direct input from the multiplexed external bus interface (MEBI) sub-block of the core for the IRQ and
XIRQ pin data.
17.3
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
17.3.1
17.3.2
Freescale Semiconductor
Address
0x0015
0x0016
0x001F
External Signal Description
Memory Map and Register Definition
Address
(OPTIONAL)
0x0015
0x0016
0x001F
Offset
Module Memory Map
Register Descriptions
HPRIO
ITEST
Name
ITCR
Interrupt Test Control Register (ITCR)
Interrupt Test Registers (ITEST)
Highest Priority Interrupt (Optional) (HPRIO)
W
W
W
R
R
R
PSEL7
INTE
Bit 7
0
Figure 17-2. INT Register Summary
= Unimplemented or Reserved
MC9S12E256 Data Sheet, Rev. 1.08
PSEL6
INTC
Table 17-1. INT Memory Map
6
0
PSEL5
INTA
5
0
Use
WRTINT
PSEL4
INT8
4
PSEL3
ADR3
INT6
3
PSEL2
ADR2
INT4
2
Chapter 17 Interrupt (INTV1)
PSEL1
ADR1
INT2
Access
1
R/W
R/W
R/W
ADR0
Bit 0
INT0
0
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