ST7FMC2R6T6 STMicroelectronics, ST7FMC2R6T6 Datasheet - Page 107

MCU 8BIT 32K FLASH 64TQFP

ST7FMC2R6T6

Manufacturer Part Number
ST7FMC2R6T6
Description
MCU 8BIT 32K FLASH 64TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC2R6T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ST7FMC2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4868

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FMC2R6T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FMC2R6T6
Manufacturer:
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0
10.5 LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER/SLAVE)
10.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format. The SCI of-
fers a very wide range of baud rates using two
baud rate generator systems.
The LIN-dedicated features support the LIN (Local
Interconnect Network) protocol for both master
and slave nodes.
This chapter is divided into SCI Mode and LIN
mode sections. For information on general SCI
communications, refer to the SCI mode section.
For LIN applications, refer to both the SCI mode
and LIN mode sections.
10.5.2 SCI Features
Full duplex, asynchronous communications
NRZ standard format (Mark/Space)
Independently programmable transmit and
receive baud rates up to 500K baud
Programmable data word length (8 or 9 bits)
Receive buffer full, Transmit buffer empty and
End of Transmission flags
2 receiver wake-up modes:
– Address bit (MSB)
– Idle line
Muting function for multiprocessor configurations
Separate enable bits for Transmitter and
Receiver
Overrun, Noise and Frame error detection
10.5.3 LIN Features
– LIN Master
– LIN Slave
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error
– Parity interrupt
– Transmits parity bit
– Checks parity of received data byte
– 13-bit LIN Synch Break generation
– Automatic Header Handling
– Automatic baud rate resynchronization based
– Automatic baud rate adjustment (at CPU fre-
– 11-bit LIN Synch Break detection capability
– LIN Parity check on the LIN Identifier Field
– LIN Error management
– LIN Header Timeout
– Hot plugging support
6 interrupt sources
Parity control:
Reduced power consumption mode
on recognition and measurement of the LIN
Synch Field (for LIN slave nodes)
quency precision)
(only in reception)
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