ST7FMC2R6T6 STMicroelectronics, ST7FMC2R6T6 Datasheet - Page 184

• Manufacturer Part Number: ST7FMC2R6T6
• Description: MCU 8BIT 32K FLASH 64TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FMC2R6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ST7FMC2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4868

ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
Three kinds of interrupt can be generated in
Speed Sensor Mode, as summarized in
104:
– C interrupt, when a capture event occurs; this in-
– RPI/RMI interrupts occur when the ST[3:0] bits of
– S interrupt occurs when a Speed Error happens
These interrupts may be masked individually.
Note on Delay Manager Initialization in Speed
Figure 104. Prescaler auto-change example
184/309
1
C
terrupt shares resources (Mask bit and Flag) with
the Commutation event in Switched/Au-
toswitched Mode, as these modes are mutually
exclusive.
the MPSR register are changed, either automat-
ically or by hardware.
(i.e. a successful comparison between
[MTIM:MTIML] and [MDREG:FF]). This interrupt
has the same channel as the Emergency Stop in-
terrupt (MCES), as it also warns the user about
abnormal system operation. The respective Flag
bits have to be tested in the interrupt service rou-
tine to differentiate Speed Errors from Emergen-
cy Stop events.
RMI Ratio Decrement
RPI
Notes:
E
APTURE
C
S
VENTS
FAFFh
FFFFh
8000h
5500h
Events:
Capture
Speed Error
Ratio Increment
[MTIM:MTIML]
[MTIM:MTIML] Input Clock:
C
F
F
x
x
/ 2
(ST[3:0] = n)
(ST[3:0] = n+1)
S
RPI
Figure
C
Measurement Mode: In order to set-up the
[MTIM:MTIML] counter properly before any speed
measurement, the following procedure must be
applied:
– The peripheral clock must be disabled (resetting
– MTIM, MTIML must be reset and appropriate val-
Note on MTIML: The Least Significant Byte of the
counter (MTIML) is not used when working in Po-
sition Sensor or Sensorless Modes.
Debug option: a signal reflecting the capture
events may be output on a standard I/O port for de-
bugging purposes. Refer to
page 172
the CKE bit in the MCRA register) to allow write
access to ST[3:0], MTIM and MTIML (refer to
ble
ues must be written in the ST[3:0] prescaler
adapt to the frequency of the signal being meas-
ured and to allow speed measurement with suffi-
cient resolution.
41),
for more details.
C
RMI
C
C
section10.6.7.3 on
WORKING
U
RANGE
SUAL
Ta-