ST7FMC2R6T6 STMicroelectronics, ST7FMC2R6T6 Datasheet - Page 213

MCU 8BIT 32K FLASH 64TQFP

ST7FMC2R6T6

Manufacturer Part Number
ST7FMC2R6T6
Description
MCU 8BIT 32K FLASH 64TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC2R6T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ST7FMC2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4868

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FMC2R6T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FMC2R6T6
Manufacturer:
ST
0
MOTOR CONTROLLER (Cont’d)
Table 62. PWM mode when SR=1
Table 63. PWM mode when DAC=1
Warning: As the MCRB register contains preload
bits with, it has to be written as a complete byte. A
Bit Set or Bit Reset instruction on a non-preload bit
will have the effect of resetting all the preload bits.
CONTROL REGISTER C (MCRC)
Read/Write (except EDIR bit)
Reset Value: 0000 0000 (00h)
Bit 7= SEI/OI: Speed Error interrupt flag / MTIM
Overflow flag
Position Sensor or Sensorless mode (TES[1:0]
bits =00):
OI: MTIM Overflow flag
This flag signals an overflow of the MTIM timer. It
0: No MTIM timer overflow
1: MTIM timer overflow
Note: No interrupt is associated with this flag
Speed Sensor mode (TES[1:0] bits =01, 10, 11):
OS2
OS2
SEI /
bit
bit
0
1
x
OI
has to be cleared by software.
7
PWM after
Channels
Channels
before Z
On High
EDIR/
Unused
On Low
C and
HZ
6
x
SZ
5
OS1
OS1
bit
bit
x
x
x
SC
4
Unused OS0
Unused OS0
x
x
x
SPLG
3
0
1
0
1
0
1
VR2
2
PWM after Z
and before
channels
channels
channels
channels
PWM on
channels
channels
outputs
VR1
On high
On high
On high
next C
On low
On low
On low
1
VR0
0
SEI: Speed error interrupt flag
0: No Tacho Error interrupt pending
1: Tacho Error interrupt pending
Bit 6= EDIR/HZ : Encoder Direction bit/ Hardware
Position Sensor or Sensorless mode (TES[1:0]
bits =00):
HZ: Hardware zero-crossing event bit
This Read/Write bit selects if the Z event is hard-
ware or not.
0: No hardware zero-crossing event
1: Hardware zero-crossing event
Speed Sensor mode (TES[1:0] bits =01, 10, 11):
EDIR:Encoder Direction bit
This bit is Read only. As the rotation direction de-
pends on encoder outputs and motor phase con-
nections, this bit cannot indicate absolute direc-
tion. It therefore gives the relative phase-shift (i.e.
advance/delay) between the two signals in quad-
rature output by the encoder (see
0: MCIA input delayed compared to MCIB input.
1: MCIA input in advance compared to MCIB input
Bit 5 = SZ: Simulated zero-crossing event bit
0: No simulated zero-crossing event
1: Simulated zero-crossing event
Bit 4 = SC: Simulated commutation event bit
0: Hardware commutation event in auto-switched
1: Simulated commutation event in auto-switched
Bit 3 = SPLG: Sampling Z event at high frequency
This bit enables sampling at high frequency in sen-
sorless mode independently of the PWM signal or
only during ON time if the DS[3:0] bits in the
MCONF register contain a value. Refer to
Table 77, “Sampling Delay,” on page 224
0: Normal mode (Z sampling at PWM frequency at
1: Z event sampled at f
Note: When the SPLG bit is set, there is no mini-
mum OFF time programmed by the OT [3:0] bits,
the OFF time is forced to 0µs. This means that in
current mode, the OFF time of the PWM signal will
come only from the current loop.
zero-crossing event bit
mode (SWA = 1 in MCRA register)
mode (SWA = 1 in MCRA register).
in sensorless mode (SR=0)
the end of the off time)
SCF
ST7MC1xx/ST7MC2xx
(see
Table
Figure
82)
90).
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