ST7FMC2R6T6 STMicroelectronics, ST7FMC2R6T6 Datasheet - Page 153

MCU 8BIT 32K FLASH 64TQFP

ST7FMC2R6T6

Manufacturer Part Number
ST7FMC2R6T6
Description
MCU 8BIT 32K FLASH 64TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC2R6T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ST7FMC2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4868

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FMC2R6T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FMC2R6T6
Manufacturer:
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0
MOTOR CONTROLLER (Cont’d)
10.6.6.5 Demagnetization (D) Event
At the end of the demagnetization phase, current
no longer goes through the free-wheeling diodes.
The voltage on the non-excited winding terminal
goes from one of the power rail voltages to the
common star connection voltage plus the BEMF
voltage. In some cases (if the BEMF voltage is
positive and the free-wheeling diodes are at
ground for example) this end of demagnetization
can be seen as a voltage edge on the selected
MCIx input and it is called a hardware demagneti-
zation event D
The D event filter can be used to select the
number of consecutive D events needed to gener-
ate the D
If enabled by the HDM bit in the MCRB register,
the current value of the MTIM timer is captured in
register MDREG when this event occurs in order
to be able to simulate the demagnetization phase
for the next steps.
When enabled by the SDM bit in the MCRB regis-
ter, demagnetization can also be simulated by
comparing the MTIM timer with the MDREG regis-
ter. This kind of demagnetization is called simulat-
ed demagnetization D
If the HDM and SDM bits are both set, the first
event that occurs, triggers a demagnetization
event. For this to work correctly, a D
Figure 81. D Event Generation Mechanism
SPLG bit
Sample
HDM bit
SDM bit
MCRC
Register
C
D
S,H
D
D
S
H
H
2
1
event.
H
F(x)
. See
CPB
MCRB Register
or
To Z event detection
n
bit
Table
S
*
.
HDM
30.
D = D
n
bit*
MCRA Register
H
& HDM bit + D
S
event must
SR bit
* = Preload register, changes taken into account at next C event
§
Register updated on R event
S
& SDM bit
not precede a D
be detected as a Z event.
Simulated demagnetization can also be always
used if the HDM bit is reset and the SDM bit is set.
This mode works as a programmable masking
time between the C
motor securely, the masking time must be always
greater than the real demagnetization time in order
to avoid a spurious Z event.
When an event occurs, (either D
in the MISR register is set and an interrupt request
is generated if the DIM bit of register MIMR is set.
Caution 1: Due to the alternate automatic capture
and compare of the MTIM timer with MDREG reg-
ister by D
should be manipulated with special care.
Caution 2: Due to the event generation protection
in the MZREG, MCOMP and MDREG registers for
Soft Event generation ( See “Built-in Checks and
Controls for simulated events” on page 175.), the
value written in the MDREG register in soft demag-
netisation mode (SDM=1) is checked by hardware
after the C event. If this value is less than or equal
to the MTIM counter value at this moment, the
Software demagnetisation event is generated im-
mediately and the MTIM current value overwrites
the value in the MDREG register to be able to re-
use the right demagnetisation time for another
simulated event generation.
D
H
H
MDFR Register
MCRB Register
DWF[3:0]
DEF[3:0]
SDM* bit
and D
H
D
S
event because the latter could
MTIM [8-bit Up Counter]
H
H
events, the MDREG register
MDREG [D
and Z events. To drive the
ST7MC1xx/ST7MC2xx
Compare
To interrupt generator
8
D
n
H
]
§
or D
D
MDFR Register
S
S
) the DI bit
DWF[3:0]
§
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