UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
16
78K0R/Lx3
16-Bit Single-Chip Microcontrollers
www.renesas.com
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
User’s Manual: Hardware
Rev.4.01
Jul 2010

Related parts for UPD78F1506GF-GAT-AX

UPD78F1506GF-GAT-AX Summary of contents

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Single-Chip Microcontrollers All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the ...

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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

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VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: reflected wave may cause malfunction. (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. from entering the device when the input level is fixed, and also in the transition period ...

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Readers This manual is intended for user engineers who wish to understand the functions of the 78K0R/Lx3 microcontrollers and design and develop application systems and programs for these devices. The target products are as follows. • 78K0R/LF3: <R> • 78K0R/LG3: ...

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Conventions Data significance: Active low representations: ××× (overscore over pin and signal name) Note: Caution: Remark: Numerical representations: Binary Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. ...

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Other Documents SEMICONDUCTOR SELECTION GUIDE − Products and Packages − Semiconductor Device Mount Manual Quality Grades on NEC Semiconductor Devices NEC Semiconductor Device Reliability/Quality Control System Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) Note See the ...

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CHAPTER 1 OUTLINE............................................................................................................................. 17 1.1 Features......................................................................................................................................... 17 1.2 Ordering Information.................................................................................................................... 19 1.3 Pin Configuration (Top View) ...................................................................................................... 20 1.3.1 78K0R/LF3 ...................................................................................................................................... 20 1.3.2 78K0R/LG3 ..................................................................................................................................... 22 1.3.3 78K0R/LH3...................................................................................................................................... 24 1.4 Block Diagram .............................................................................................................................. 26 1.4.1 78K0R/LF3 ...................................................................................................................................... 26 1.4.2 78K0R/LG3 ...

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CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 81 3.1 Memory Space .............................................................................................................................. 81 3.1.1 Internal program memory space ..................................................................................................... 86 3.1.2 Mirror area....................................................................................................................................... 88 3.1.3 Internal data memory space............................................................................................................ 90 3.1.4 Special function register (SFR) area ............................................................................................... 91 3.1.5 ...

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Port 14......................................................................................................................................... 180 4.2.16 Port 15......................................................................................................................................... 183 4.3 Registers Controlling Port Function ........................................................................................ 187 4.4 Port Function Operations .......................................................................................................... 204 4.4.1 Writing to I/O port .......................................................................................................................... 204 4.4.2 Reading from I/O port.................................................................................................................... 204 4.4.3 Operations on I/O port................................................................................................................... 204 ...

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Basic rules of combination operation function ............................................................................... 304 6.6.3 Applicable range of basic rules of combination operation function ................................................ 305 6.7 Operation of Timer Array Unit as Independent Channel ........................................................ 306 6.7.1 Operation as interval timer/square wave output ............................................................................ ...

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Basic operations of A/D converter ............................................................................................... 408 10.4.2 Input voltage and conversion results ........................................................................................... 410 10.4.3 A/D converter operation modes................................................................................................... 411 10.5 How to Read A/D Converter Characteristics Table............................................................... 417 10.6 Cautions for A/D Converter ..................................................................................................... 419 CHAPTER 11 ...

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UART transmission ..................................................................................................................... 528 14.6.2 UART reception........................................................................................................................... 538 14.6.3 LIN transmission.......................................................................................................................... 545 14.6.4 LIN reception............................................................................................................................... 548 14.6.5 Calculating baud rate .................................................................................................................. 553 14.7 Operation of Simplified I 14.7.1 Address field transmission .......................................................................................................... 558 14.7.2 Data transmission........................................................................................................................ 563 14.7.3 Data ...

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Static display example................................................................................................................. 692 16.7.2 Two-time-slice display example .................................................................................................. 695 16.7.3 Three-time-slice display example ................................................................................................ 698 16.7.4 Four-time-slice display example .................................................................................................. 702 16.7.5 Eight-time-slice display example ................................................................................................. 705 16.8 Supplying LCD Drive Voltages V 16.8.1 External resistance division method ...

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CHAPTER 20 KEY INTERRUPT FUNCTION ..................................................................................... 776 20.1 Functions of Key Interrupt ...................................................................................................... 776 20.2 Configuration of Key Interrupt ................................................................................................ 776 20.3 Register Controlling Key Interrupt ......................................................................................... 777 CHAPTER 21 STANDBY FUNCTION .................................................................................................. 778 21.1 Standby Function and Configuration ..................................................................................... ...

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Connection of Pins on Board.................................................................................................. 842 27.4.1 FLMD0 pin................................................................................................................................... 842 27.4.2 TOOL0 pin................................................................................................................................... 843 27.4.3 RESET pin .................................................................................................................................. 843 27.4.4 Port pins ...................................................................................................................................... 843 27.4.5 REGC pin .................................................................................................................................... 843 27.4.6 X1 and X2 pins ............................................................................................................................ 843 27.4.7 Power supply............................................................................................................................... ...

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APPENDIX A DEVELOPMENT TOOLS............................................................................................... 944 A.1 Software Package ...................................................................................................................... 947 A.2 Language Processing Software ............................................................................................... 947 A.3 Flash Memory Programming Tools.......................................................................................... 948 A.3.1 When using flash memory programmer PG-FP5 and FL-PR5...................................................... 948 A.3.2 When using on-chip debug emulator with programming ...

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RENESAS MCU The 78K0R/Lx3 microcontrollers are 16-bit single-chip microcontrollers that include the 78K0R CPU core and peripheral functions such as ROM/RAM, LCD controller/driver, A/D converter, D/A converter, operational amplifier, multifunctional serial interfaces, multifunctional timers, real-time counter, and watchdog timer. ...

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Serial interface: 1 channel • 78K0R/LF3: CSI: 1 channel/UART: 1 channel/simplified I CSI: 1 channel/UART: 1 channel/simplified I UART (LIN-bus supported): 1 channel • 78K0R/LG3: CSI: 1 channel/UART: 1 channel CSI: 1 channel/UART: 1 channel/simplified I CSI: 1 channel/UART: ...

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Ordering Information • Flash memory version (Lead-free products) <R> 78K0R/Lx3 microcontrollers 78K0R/LF3 80-pin plastic LQFP (14x14) 80-pin plastic LQFP (fine pitch) (12x12) 78K0R/LG3 100-pin plastic LQFP (fine pitch) (14x14) 78K0R/LH3 128-pin plastic LQFP (fine pitch) (14x20) Caution The ...

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Pin Configuration (Top View) 1.3.1 78K0R/LF3 • 80-pin plastic LQFP (14×14) • 80-pin plastic LQFP (fine pitch) (12×12) 1 P120/INTP0/EXLVI 2 P41/TOOL1 3 P40/TOOL0 4 P00/CAPH 5 P01/CAPL 6 P02/V LC3 7 V LC2 8 V LC1 9 ...

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Pin Identification AMP0- , AMP1- : Amplifier Input Minus AMP0+ , AMP1+ : Amplifier Input Plus AMP0O , AMP0O : Amplifier Output ANI0 to ANI6, ANI15 : Analog Input (ADC) ANO0, ADO1 : Analog Output (DAC Analog ...

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LQFP (fine pitch) (14×14) 100 P120/EXLVI/INTP0 1 P41/TOOL1 2 3 ...

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Pin Identification AMP0- to AMP2- : Amplifier Input Minus AMP0+ to AMP2+ : Amplifier Input Plus AMP0O to AMP2O : Amplifier Output ANI0 to ANI10, ANI15 : Analog Input (ADC) ANO0, ADO1 : Analog Output (DAC Analog ...

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LQFP (fine pitch) (14×20) P120/EXLVI/INTP0 P77/KR7/SO01 P76/KR6/SI01 P75/KR5/SCK01 P74/KR4 P73/KR3 P72/KR2 P71/KR1 P70/KR0 P41/TOOL1 P40/TOOL0 P80/INTP11/SCK00 P81/INTP9/RxD0/SI00 P82/TxD0/SO00 P83 P84/TO10/TI10 P85/TO11/TI11 P86/TO12/TI12 P87/TO13/TI13 P00/CAPH P01/CAPL P02/V LC3 V LC2 V LC1 V LC0 RESET ...

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Pin Identification AMP0- to AMP2- : Amplifier Input Minus AMP0+ to AMP2+ : Amplifier Input Plus AMP0O to AMP2O : Amplifier Output ANI0 to ANI10, ANI15 : Analog Input (ADC) ANO0, ADO1 : Analog Output (DAC Analog ...

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Block Diagram 1.4.1 78K0R/LF3 TIMER ARRAY UNIT0 (8ch) TI00/P31 ch0 TO00/P30 ch1 TI01/TO01/P32 TI02/P52 ch2 TO02/P12 TI03/P30 ch3 TO03/P31 TI04/P53 ch4 TO04/P13 ch5 ch6 TI07/TO07/P33 ch7 RxD3/P50 (LINSEL) TIMER ARRAY UNIT1 (4ch) ch0 ch1 ch2 ch3 LOW-SPEED INTERNAL ...

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TIMER ARRAY UNIT0 (8ch) TI00/P31 ch0 TO00/P30 ch1 TI01/TO01/P32 TI02/P52 ch2 TO02/P12 TI03/P30 ch3 TO03/P31 TI04/P53 ch4 TO04/P13 ch5 TI05/TO05/P16 TI06/TO06/P34 ch6 TI07/TO07/P33 ch7 RxD3/P50 (LINSEL) TIMER ARRAY UNIT1 (4ch) ch0 ch1 ch2 ch3 LOW-SPEED INTERNAL OSCILLATOR ...

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TIMER ARRAY UNIT0 (8ch) TI00/P31 ch0 TO00/P30 ch1 TI01/TO01/P32 TI02/P52 ch2 TO02/P12 TI03/P30 ch3 TO03/P31 TI04/P53 ch4 TO04/P13 ch5 TI05/TO05/P16 TI06/TO06/P34 ch6 TI07/TO07/P33 ch7 RxD3/P50 (LINSEL) TIMER ARRAY UNIT1 (4ch) ch0 TI10/TO10/P84 ch1 TI11/TO11/P85 ch2 TI12/TO12/P86 ch3 ...

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Outline of Functions Item Internal Flash memory memory (self-programming supported) RAM Memory space Main system High-speed system clock clock (Oscillation Internal high-speed frequency) oscillation clock <R> 20 MHz Internal high- speed oscillation clock Subsystem clock (Oscillation frequency) Internal ...

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Item Operational amplifier Voltage reference Serial UART supporting interface LIN-bus CSI/UART/ simplified I CSI/UART CSI (2 ch) /UART 2 Multimaster I C LCD controller/driver Segment signal output Common signal output Multiplier/divider DMA controller <R> Vectored interrupt Internal sources External ...

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Pin Function List There are four types of pin I/O buffer power supplies: AV power supplies and the pins is shown below. Power Supply AV DD0 AV DD1 R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 CHAPTER ...

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Port functions (1/2) : 78K0R/LF3 Function Name I/O Port 0. P00 I/O 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software ...

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Port functions (2/2) : 78K0R/LF3 Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. ...

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Non-port functions (1/4) : 78K0R/LF3 Function Name I/O ANI0 Input A/D converter analog input ANI1 ANI2 ANI3 ANI4 ANI5 ANI6 ANI15 AMP0- Input Operational amplifier input (negative side) AMP1- AMP0+ Input Operational amplifier input (positive side) AMP1+ AMP0O ...

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Non-port functions (2/4) : 78K0R/LF3 Function Name I/O − CAPH Connecting a capacitor for LCD controller/driver CAPL EXLVI Input Potential input for external low-voltage detection External interrupt request input for which the valid edge (rising INTP0 Input edge, ...

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Non-port functions (3/4) : 78K0R/LF3 Function Name I/O SDA10 I/O Serial data I/O for simplified I SDA20 SI10 Serial data input to CSI10 SI20 Serial data input to CSI20 SO10 Output Serial data output from CSI10 SO20 Serial ...

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Non-port functions (4/4) : 78K0R/LF3 Function Name I/O − AV Positive power supply for P20 to P26, P157 DD0 − AV Positive power supply for P110, P111 DD1 − V Ground potential (Pins other than port and RESET, ...

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Port functions (1/2) : 78K0R/LG3 Function Name I/O Port 0. P00 I/O 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software ...

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Port functions (2/2) : 78K0R/LG3 Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. ...

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Non-port functions (1/4) : 78K0R/LG3 Function Name I/O ANI0 Input A/D converter analog input ANI1 ANI2 ANI3 ANI4 ANI5 ANI6 ANI7 ANI8 ANI9 ANI10 ANI15 AMP0- Input Operational amplifier input (negative side) AMP1- AMP2- AMP0+ Input Operational amplifier ...

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Non-port functions (2/4) : 78K0R/LG3 Function Name I/O COM0 to Output LCD controller/driver common signal outputs COM3 COM4 to COM7 − LCD drive voltage LC0 LC2 V LC3 − CAPH Connecting a capacitor for LCD ...

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Non-port functions (3/4) : 78K0R/LG3 Function Name I/O RxD0 Input Serial data input to UART0 RxD1 Serial data input to UART1 RxD2 Serial data input to UART2 RxD3 Serial data input to UART3 SCK00 I/O Clock input/output for ...

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Non-port functions (4/4) : 78K0R/LG3 Function Name I/O TO00 Output 16-bit timer 00 output TO01 16-bit timer 01 output TO02 16-bit timer 02 output TO03 16-bit timer 03 output TO04 16-bit timer 04 output TO05 16-bit timer 05 ...

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Port functions (1/3) : 78K0R/LH3 Function Name I/O Port 0. P00 I/O 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software ...

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Port functions (2/3) : 78K0R/LH3 Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. ...

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Port functions (3/3) : 78K0R/LH3 Function Name I/O P140 to P147 I/O Port 14. 8-bit I/O port. Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P150 ...

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Non-port functions (2/5) : 78K0R/LH3 Function Name I/O SEG0 to SEG3 Output LCD controller/driver segment signal outputs SEG4 to SEG26 SEG27 to SEG29 SEG30 to SEG37 SEG38 to SEG45 SEG46 to SEG49 SEG50 SEG51 SEG52 SEG53 COM0 to ...

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Non-port functions (3/5) : 78K0R/LH3 Function Name I/O KR0 to KR4 Input Key interrupt input KR5 KR6 KR7 PCLBUZ0 Output Clock output/buzzer output PCLBUZ1 − REGC Connecting regulator output (2.4 V) stabilization capacitance for internal operation. Connect to ...

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Non-port functions (4/5) : 78K0R/LH3 Function Name I/O SI00 Input Serial data input to CSI00 SI01 Serial data input to CSI01 SI10 Serial data input to CSI10 SI20 Serial data input to CSI20 SO00 Output Serial data output ...

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Non-port functions (5/5) : 78K0R/LH3 Function Name I/O TO10 Output 16-bit timer 10 output TO11 16-bit timer 11 output TO12 16-bit timer 12 output TO13 16-bit timer 13 output TxD0 Output Serial data output from UART0 TxD1 Serial ...

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Description of Pin Functions Remark The pins mounted depend on the product. Refer to 1.3 Pin Configuration (Top View) and 2.1 Pin Function List. 2.2.1 P00 to P02 P00 to P02 function as an I/O port. This port ...

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P10 to P17 P10 to P17 function as an I/O port. This port can also be used for external interrupt request input, serial interface data I/O, clock I/O, and timer I/O. Input to the P10, P11, P14, and ...

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TxD1, TxD2 These are serial data output pin of serial interface UART1 and UART2. (h) TI05 This is a timer input pin of 16-bit timer 05. (i) TO02, TO04, TO05 These are the timer output pins of 16-bit ...

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P20 to P27 P20 to P27 function as an I/O port. This port can also be used for A/D converter analog input, and operational amplifier I/O. P20/ANI0/AMP0- P21/ANI1/AMP0O P22/ANI2/AMP0+ P23/ANI3/AMP1- P24/ANI4/AMP1O P25/ANI5/AMP1+ P26/ANI6/AMP2- P27/ANI7/AMP2O The following operation modes ...

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P30 to P34 P30 to P34 function as an I/O port. This port can also be used for timer I/O, real-time counter clock output, correction clock output, clock output/buzzer output, and external interrupt request input. P30/TI03/TO00/RTC1HZ/ INTP1 P31/TI00/TO03/RTCDIV/ ...

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Cautions 1. To use P30/TO00/TI03/RTC1HZ/INTP1 as a general-purpose port, set bit 5 (RCLOE1) of real-time counter control register 0 (RTCC0), bit 0 (TO00) of timer output register 0 (TO0) and bit 0 (TOE00) of timer output enable register 0 ...

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TOOL1 This is a clock output pin for a debugger. When the on-chip debug function is used, P41/TOOL1 pin can be used as follows by the mode setting on the debugger. 1-line mode: can be used as a ...

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Control mode P50 to P57 function as serial interface data I/O, timer input, and segment output of LCD controller/driver. (a) RxD3 This is a serial data input pin of serial interface UART3. (b) TxD3 This is a serial ...

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P70 to P77 P70 to P77 function as an I/O port. This port can also be used for key return input, serial interface clock I/O, and data I/O. Input to the P75, and P76 pins can be specified ...

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P80 to P87 P80 to P87 function as an I/O port. This port can also be used for serial interface clock I/O, data I/O, timer I/O, and external interrupt request input. Output from the P80 and P82 pins ...

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INTP9, INTP11 These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. Caution To use P80/SCK00/INTP11, P81/RxD0/SI00/INTP9, and P82/SO00/TxD0 general-purpose ...

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P100 to P102 P100 to P102 function as an I/O port. This port can also be used for segment output of LCD controller/driver. P100/SEGxx P101/SEGxx P102/SEGxx The following operation modes can be specified in 1-bit units. (1) Port ...

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P120 to P124 P120 function as an I/O port. P121 to P124 function as an input port. These pins also function as potential input for external low-voltage detection, connecting resonator for main system clock, connecting resonator for subsystem ...

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P130 P130 functions as an output port. P130 Remark The P130 pin outputs a low level when it is used as a port function pin and a reset is effected. If P130 is set to output a high ...

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P150 to P152, P157 P150 to P152 and P157 function as an I/O port. This port can also be used for A/D converter analog input, reference voltage input, and operational amplifier input. P150/ANI8/AMP2+ P151/ANI9 P152/ANI10 P157/ANI15/AV REFM The ...

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V /AV REFOUT REFP analog reference voltage output pin for voltage reference. REFOUT AV is the pin that inputs the positive reference voltage of the A/D converter and D/A converter. REFP 2.2.21 RESET This is ...

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DD0 DD1 SS DD (1) AV DD0 This is the ground potential pin of A/D converter, operational amplifier, voltage reference, P20 to P27, P150 to P152 and P157. When ...

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Pin I/O Circuits and Recommended Connection of Unused Pins 2.3.1 78K0R/LF3 Table 2-2 shows the types of pin I/O circuits and the recommended connections of unused pins. Table 2-2. Connection of Unused Pins (78K0R/LF3) (1/2) Pin Name I/O ...

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Table 2-2. Connection of Unused Pins (78K0R/LF3) (2/2) Pin Name I/O Circuit Type P90/SEG22 to P92/SEG20 17-P P100/SEG11 P110/ANO0, P111/ANO1 12-A P120/INTP0/EXLVI 8-R Note 1 P121/X1 37-C Note 1 P122/X2/EXCLK Note 1 P123/XT1 37-A Note 1 P124/XT2 P130 3-C ...

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Table 2-3 to shows the types of pin I/O circuits and the recommended connections of unused pins. Table 2-3. Connection of Unused Pins (78K0R/LG3) (1/3) Pin Name I/O Circuit Type P00/CAPH 12-H P01/CAPL 5-AT P02/V LC3 P10/SCK20/SCL20 ...

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Table 2-3. Connection of Unused Pins (78K0R/LG3) (2/3) Pin Name I/O Circuit Type P50/SEG39/RxD3 17-Q P51/SEG38/TxD3 17-P P52/SEG37/TI02 17-Q P53/SEG36/TI04 P54/SEG35 to P57/SEG32 17-P P60/SCL0 13-R P61/SDA0 P80/SCK00/INTP11 8-R P81/RxD0/SI00/INTP9 P82/SO00/TxD0 5-AG P90/SEG31 to P97/SEG24 17-P P100/SEG15 P110/ANO0, P111/ANO1 ...

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Table 2-3. Connection of Unused Pins (78K0R/LG3) (3/3) Pin Name I/O Circuit Type Note P150/ANI8/AMP2+ 11-N Note P151/ANI9 11-G Note P152/ANI10 Note P157/ANI15/AV 11-T REFM SEG0/COM4 to SEG3/COM7 18-F SEG4 to SEG14 17-T COM0 to COM3 18 ...

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Table 2-4 to shows the types of pin I/O circuits and the recommended connections of unused pins. Table 2-4. Connection of Unused Pins (78K0R/LH3) (1/3) Pin Name I/O Circuit Type P00/CAPH 12-H P01/CAPL 5-AT P02/V LC3 P10/SCK20/SCL20 ...

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Table 2-4. Connection of Unused Pins (78K0R/LH3) (2/3) Pin Name I/O Circuit Type P50/SEG53/RxD3 17-Q P51/SEG52/TxD3 17-P P52/SEG51/TI02 17-Q P53/SEG50/TI04 P54/SEG49 to P57/SEG46 17-P P60/SCL0 13-R P61/SDA0 P70/KR0 to P74/KR4 8-R P75/KR5/SCK01 5-AN P76/KR6/SI01 P77/KR7/SO01 8-R P80/SCK00/INTP11 P81/RxD0/SI00/INTP9 P82/SO00/TxD0 ...

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Table 2-4. Connection of Unused Pins (78K0R/LH3) (3/3) Pin Name I/O Circuit Type Note P150/ANI8/AMP2+ 11-N Note P151/ANI9 11-G Note P152/ANI10 Note P157/ANI15/AV 11-T REFM SEG0/COM4 to SEG3/COM7 18-F SEG4 to SEG26 17-T COM0 to COM3 18 ...

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Type 2 IN Schmitt-triggered input with hysteresis characteristics Type 3-C EV data Type 5-AN pull-up enable data output disable CMOS TTL input characteristic R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 2-1. Pin I/O Circuit List (1/5) Type 2-W IN Schmitt-triggered ...

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Type 8-R pullup enable EV data output disable EV Type 11-N data output disable P-ch Comparator + _ N-ch V REF (Threshold voltage input enable Type 11-S data output disable P-ch Comparator + _ N-ch V REF ...

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Type 12-A AV data output disable AV input enable P-ch analog output voltage N-ch Type 13-R data output disable R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 2-1. Pin I/O Circuit List (3/5) Type 12-H DD1 P-ch pullup enable IN/OUT N-ch ...

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Type 17-Q pullup enable data output disable input enable V LC0 P-ch V LC1 N-ch P-ch SEG data N-ch P-ch V LC2 N-ch P-ch V LC3 N-ch N- R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 2-1. Pin I/O ...

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Type 18-F P-ch V LC0 P-ch V LC1 N-ch P-ch N-ch COM data P-ch V LC2 N-ch P-ch V LC3 N-ch N- LC0 P-ch V LC1 N-ch P-ch SEG data N-ch P-ch V LC2 N-ch P-ch ...

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Memory Space Products in the 78K0R/Lx3 microcontrollers can access memory space. Figures 3-1 to 3-3 show the memory maps. Figure 3-1. Memory Map ( Special function register (SFR) F ...

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Figure 3-2. Memory Map ( Special function register (SFR General-purpose register ...

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Figure 3-3. Memory Map ( Special function register (SFR General-purpose register ...

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Remark The flash memory is divided into blocks (one block = 1 KB). For the address values and block numbers, see Table 3-1 Correspondence Between Address Values and Block Numbers in Flash Memory. R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 0 ...

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Correspondence between the address values and block numbers in the flash memory are shown below. Table 3-1. Correspondence Between Address Values and Block Numbers in Flash Memory Block Address Value Address Value Number 00000H to 003FFH 00H 08000H to ...

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Internal program memory space The internal program memory space stores the program and table data. Normally addressed with the program counter (PC). 78K0R/Lx3 microcontrollers products incorporate internal ROM (flash memory), as shown below. Part Number μ ...

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Vector Table Interrupt Source Address 00000H RESET input, POC, LVI, WDT, TRAP 00004H INTWDTI 00006H INTLVI 00008H INTP0 0000AH INTP1 0000CH INTP2 0000EH INTP3 00010H INTP4 00012H INTP5 00014H INTST3 00016H INTSR3 00018H INTSRE3 0001AH INTDMA0 0001CH INTDMA1 0001EH ...

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On-chip debug security ID setting area A 10-byte area of 000C4H to 000CDH and 010C4H to 010CDH can be used as an on-chip debug security ID setting area. Set the on-chip debug security bytes at ...

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The following show examples. μ Example 1 PD78F1500A, 78F1503A, 78F1506A (Flash memory: 64 KB, RAM: 4 KB) Setting MAA = Special-function register 256 bytes ...

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PMC register is described below. • Processor mode control register (PMC) This register selects the flash memory space for mirroring to area from F0000H to FFFFFH. PMC can be set by a 1-bit or 8-bit memory manipulation instruction. Reset ...

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Special function register (SFR) area On-chip peripheral hardware special function registers (SFRs) are allocated in the area FFF00H to FFFFFH. Caution Do not access addresses to which SFRs are not assigned. 3.1.5 Extended special function register (2nd SFR: ...

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Data memory addressing Addressing refers to the method of specifying the address of the instruction to be executed next or the address of the register or memory relevant to the execution of instructions. Several addressing modes are provided ...

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Figure 3-6. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...

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Figure 3-7. Correspondence Between Data Memory and Addressing ( Special function register (SFR 256 bytes ...

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Processor Registers The 78K0R/Lx3 microcontrollers products incorporate the following processor registers. 3.2.1 Control registers The control registers control the program sequence, statuses and stack memory. The control registers consist of a program counter (PC), a program status word ...

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Auxiliary carry flag (AC) If the operation result has a carry from bit borrow at bit 3, this flag is set (1 reset (0) in all other cases. (e) In-service priority flags (ISP1, ...

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PUSH rp instruction SP←SP−2 ↑ Register pair lower SP−2 ↑ SP−1 Register pair higher ↑ → SP CALL, CALLT instructions SP←SP−4 ↑ SP−4 ↑ SP−3 ↑ SP−2 ↑ SP−1 ↑ → SP 3.2.2 General-purpose registers General-purpose registers are mapped ...

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Figure 3-12. Configuration of General-Purpose Registers FFEFFH Register bank 0 FFEF8H Register bank 1 FFEF0H Register bank 2 FFEE8H Register bank 3 FFEE0H FFEFFH Register bank 0 FFEF8H Register bank 1 FFEF0H Register bank 2 FFEE8H Register bank 3 ...

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ES and CS registers The ES register is used for data access and the CS register is used to specify the higher address when a branch instruction is executed. The default value of the ES register after reset ...

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Special function registers (SFRs) Unlike a general-purpose register, each SFR has a special function. SFRs are allocated to the FFF00H to FFFFFH area. SFRs can be manipulated like general-purpose registers, using operation, transfer, and bit manipulation instructions. The ...

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Address Special Function Register (SFR) Name FFF00H Port register 0 FFF01H Port register 1 FFF02H Port register 2 FFF03H Port register 3 FFF04H Port register 4 Port register 5 FFF05H FFF06H Port register 6 FFF07H Port register 7 FFF08H ...

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Address Special Function Register (SFR) Name FFF28H Port mode register 8 FFF29H Port mode register 9 FFF2AH Port mode register 10 FFF2BH Port mode register 11 FFF2CH Port mode register 12 Port mode register 14 FFF2EH FFF2FH Port mode ...

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Address Special Function Register (SFR) Name FFF5CH D/A converter mode register FFF64H Timer data register 02 FFF65H FFF66H Timer data register 03 FFF67H FFF68H Timer data register 04 FFF69H FFF6AH Timer data register 05 FFF6BH FFF6CH Timer data register ...

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Address Special Function Register (SFR) Name FFF9DH Real-time counter control register 0 FFF9EH Real-time counter control register 1 FFF9FH Real-time counter control register 2 FFFA0H Clock operation mode control register FFFA1H Clock operation status control register FFFA2H Oscillation stabilization ...

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Address Special Function Register (SFR) Name FFFD0H Interrupt request flag register 2 FFFD1H FFFD4H Interrupt mask flag register 2 FFFD5H FFFD8H Priority specification flag register 02 FFFD9H FFFDCH Priority specification flag register 12 FFFDDH FFFE0H Interrupt request flag register ...

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Extended special function registers (2nd SFRs: 2nd Special Function Registers) Unlike a general-purpose register, each extended SFR (2nd SFR) has a special function. Extended SFRs are allocated to the F0000H to F07FFH area. SFRs other than those in ...

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Address Special Function Register (SFR) Name F0017H A/D port configuration register F0030H Pull-up resistor option register 0 F0031H Pull-up resistor option register 1 F0033H Pull-up resistor option register 3 F0034H Pull-up resistor option register 4 F0035H Pull-up resistor option ...

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Address Special Function Register (SFR) Name F010AH Serial flag clear trigger register 01 F010BH F010CH Serial flag clear trigger register 02 F010DH F010EH Serial flag clear trigger register 03 F010FH F0110H Serial mode register 00 F0111H F0112H Serial mode ...

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Address Special Function Register (SFR) Name F0144H Serial status register 12 F0145H F0146H Serial status register 13 F0147H F0148H Serial flag clear trigger register 10 F0149H F014AH Serial flag clear trigger register 11 F014BH F014EH Serial flag clear trigger ...

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Address Special Function Register (SFR) Name F0174H Serial output level register 1 F0175H F0180H Timer counter register 00 F0181H F0182H Timer counter register 01 F0183H F0184H Timer counter register 02 F0185H F0186H Timer counter register 03 F0187H F0188H Timer ...

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Address Special Function Register (SFR) Name F01A6H Timer status register 03 F01A7H F01A8H Timer status register 04 F01A9H F01AAH Timer status register 05 F01ABH F01ACH Timer status register 06 F01ADH F01AEH Timer status register 07 F01AFH F01B0H Timer channel ...

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Address Special Function Register (SFR) Name F01CEH Timer mode register 13 F01CFH F01D0H Timer status register 10 F01D1H F01D2H Timer status register 11 F01D3H F01D4H Timer status register 12 F01D5H F01D6H Timer status register 13 F01D7H F01D8H Timer channel ...

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Address Special Function Register (SFR) Name F0409H LCD display data memory 9 F040AH LCD display data memory 10 F040BH LCD display data memory 11 F040CH LCD display data memory 12 F040DH LCD display data memory 13 F040EH LCD display ...

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Address Special Function Register (SFR) Name F042FH LCD display data memory 47 F0430H LCD display data memory 48 F0431H LCD display data memory 49 F0432H LCD display data memory 50 F0433H LCD display data memory 51 F0434H LCD display ...

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Instruction Address Addressing 3.3.1 Relative addressing [Function] Relative addressing stores in the program counter (PC) the result of adding a displacement value included in the instruction word (signed complement data: −128 to +127 or −32768 to +32767) to ...

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Table indirect addressing [Function] Table indirect addressing specifies a table address in the CALLT table area (0080H to 00BFH) with the 5-bit immediate data in the instruction word, stores the contents at that table address and the next ...

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Register direct addressing [Function] Register direct addressing stores in the program counter (PC) the contents of a general-purpose register pair (AX/BC/DE/HL) and CS register of the current register bank specified with the instruction word as 20-bit data, and ...

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Addressing for Processing Data Addresses 3.4.1 Implied addressing [Function] Instructions for accessing registers (such as accumulators) that have special functions are directly specified with the instruction word, without using any register specification field in the instruction word. [Operand ...

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Direct addressing [Function] Direct addressing uses immediate data in the instruction word as an operand address to directly specify the target address. [Operand format] Identifier ADDR16 Label or 16-bit immediate data (only the space from F0000H to FFFFFH ...

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Short direct addressing [Function] Short direct addressing directly specifies the target addresses using 8-bit data in the instruction word. This type of addressing is applied only to the space from FFE20H to FFF1FH. [Operand format] Identifier SADDR Label, ...

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SFR addressing [Function] SFR addressing directly specifies the target SFR addresses using 8-bit data in the instruction word. This type of addressing is applied only to the space from FFF00H to FFFFFH. [Operand format] Identifier SFR SFR name ...

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Register indirect addressing [Function] Register indirect addressing directly specifies the target addresses using the contents of the register pair specified with the instruction word as an operand address. [Operand format] Identifier − [DE], [HL] (only the space from ...

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Based addressing [Function] Based addressing uses the contents of a register pair specified with the instruction word as a base address, and 8- bit immediate data or 16-bit immediate data as offset data. The sum of these values ...

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OP code byte OP code Low Addr. High Addr. OP code Low Addr. High Addr. R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 3-28. Example of [HL + byte], [DE + byte] rp (HL/DE) Figure 3-29. Example of word[B], word[C] r ...

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Figure 3-31. Example of ES:[HL + byte], ES:[DE + byte] OP code byte Figure 3-32. Example of ES:word[B], ES:word[C] OP code Low Addr. High Addr. OP code Low Addr. High Addr. R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 ES rp (HL/DE) ...

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Based indexed addressing [Function] Based indexed addressing uses the contents of a register pair specified with the instruction word as the base address, and the content of the B register or C register similarly specified with the instruction ...

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Stack addressing [Function] The stack area is indirectly addressed with the stack pointer (SP) contents. This addressing is automatically employed when the PUSH, POP, subroutine call, and return instructions are executed or the register is saved/restored upon generation ...

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Port Functions There are four types of pin I/O buffer power supplies: AV power supplies and the pins is shown below. Power Supply AV DD0 AV DD1 78K0R/Lx3 products are provided with digital I/O ...

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Function Name I/O P00 I/O Port 0. 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. 6-bit I/O port. ...

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Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. P54 to P57 P90 to P92 ...

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Function Name I/O P00 I/O Port 0. 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. 7-bit I/O port. ...

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Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. P54 to P57 P60 I/O Port ...

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Function Name I/O P00 I/O Port 0. 3-bit I/O port. P01 Input/output can be specified in 1-bit units. P02 Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. 8-bit I/O port. ...

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Function Name I/O P50 I/O Port 5. 8-bit I/O port. P51 Input/output can be specified in 1-bit units. P52 Use of an on-chip pull-up resistor can be specified by a software P53 setting. P54 to P57 P60 I/O Port ...

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Function Name I/O P130 Output Port 13. 1-bit output port. P140 to P147 I/O Port 14. 8-bit I/O port. Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. ...

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Port Configuration Ports include the following hardware. Item • 78K0R/LF3 Control registers Port mode registers (PMxx) Port registers (Pxx) Pull-up resistor option registers (PUxx) : PU0, PU1, PU3 to PU5, PU9, PU10, PU12, PU14 Port input mode registers ...

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Port 0 (80 pins: 78F1501A, 78F1502A) P00/CAPH P01/CAPL P02/V LC3 Port I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units using port mode ...

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WR PU PU0 PU00, PU01 RD WR PORT P0 Output latch (P00, P01 PM0 PM00, PM01 WR LCDMD LCDMD MDSET1, MDSET0 P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode register 0 LCDMD: ...

Page 139

WR PU PU0 PU02 RD WR PORT P0 Output latch (P02 PM0 PM02 WR LCDM LCDM LCDM0 to LCDM2 WR LCDMD LCDMD MDSET1, MDSET0 P0: Port register 0 PU0: Pull-up resistor option register 0 PM0: Port mode ...

Page 140

Port 1 P10/SCK20/SCL20 P11/SI20/RxD2/SDA20/INTP6 P12/SO20/TxD2/TO02 P13/SO10/TxD1/TO04 P14/SI10/RxD1/SDA10/INTP4 P15/SCK10/SCL10/INTP7 P16/TI05/TO05/INTP10 P17 Port I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port mode ...

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Figure 4-3. Block Diagram of P10, P11, P14, and P15 WR PIM PIM1 PIM10, PIM11, PIM14, PIM15 WR PU PU1 PU10, PU11, PU14, PU15 Alternate function RD WR PORT P1 Output latch (P10, P11, P14, P15) WR POM POM1 ...

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WR PU PU1 PU12, PU13 RD WR PORT P1 Output latch (P12, P13) WR POM POM1 POM12, POM13 WR PM PM1 PM12, PM13 Alternate function (serial interface) Alternate function (timer) P1: Port register 1 PU1: Pull-up resistor option register ...

Page 143

WR PU PU1 PU16 Alternate function RD WR PORT P1 Output latch (P16 PM1 PM16 Alternate function P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: Write ...

Page 144

PORT WR PM P1: Port register 1 PU1: Pull-up resistor option register 1 PM1: Port mode register 1 RD: Read signal WR××: Write signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-6. Block Diagram of P17 ...

Page 145

Port 2 P20/ANI0/AMP0- P21/ANI1/AMP0O P22/ANI2/AMP0+ P23/ANI3/AMP1- P24/ANI4/AMP1O P25/ANI5/AMP1+ P26/ANI6/AMP2- P27/ANI7/AMP2O Port I/O port with an output latch. Port 2 can be set to the input mode or output mode in 1-bit units using port mode ...

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Table 4-6. Setting Functions of ANI0/AMP0-/P20, ANI2/AMP0+/P22, ANI3/AMP1-/P23, ANI5/AMP1+/P25, and ADPC PM2 registers register Digital I/O Input mode selection Output mode Analog input Input mode selection Output mode Table 4-7. Setting Functions of ANI1/AMP0O/P21, ANI4/AMP1O/P24, and ANI7/AMP2O/P27 Pins ADPC ...

Page 147

RD WR PORT Output latch (P20, P23, P26 PM2 PM20, PM23, PM26 Operational amplifier (-) input P2: Port register 2 PM2: Port mode register 2 RD: Read signal WR××: Write signal RD WR PORT P2 Output latch ...

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RD WR PORT P2 Output latch (P22, P25 PM2 PM22, PM25 Operational amplifier (+) input P2: Port register 2 PM2: Port mode register 2 RD: Read signal WR××: Write signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-9. ...

Page 149

Port 3 P30/TI03/TO00/RTC1HZ/ INTP1 P31/TI00/TO03/RTCDIV/ RTCCL/PCLBUZ1/INTP2 P32/TI01/TO01/PCLBUZ0/ INTP5 P33/TI07/TO07/INTP3 P34/TI06/TO06/INTP8 Port I/O port with an output latch. Port 3 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 150

WR PU PU3 PU30 to PU34 Alternate function RD WR PORT P3 Output latch (P30 to P34 PM3 PM30 to PM34 Alternate function P3: Port register 3 PU3: Pull-up resistor option register 3 PM3: Port mode register ...

Page 151

Port 4 P40/TOOL0 P41/TOOL1 Port I/O port with an output latch. Port 4 can be set to the input mode or output mode in 1-bit units using port mode register 4 (PM4). When the P40 ...

Page 152

WR PU PU40, PU41 RD WR PORT Output latch (P40, P41 PM40, PM41 P4: Port register 4 PU4: Pull-up resistor option register 4 PM4: Port mode register 4 RD: Read signal WR××: Write signal R01UH0004EJ0401 Rev.4.01 Jul ...

Page 153

Port 5 P50/RxD3/SEGxx P51/TxD3/SEGxx P52/TI02/SEGxx P53/TI04/SEGxx P54/SEGxx P55/SEGxx P56/SEGxx P57/SEGxx Port I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 154

Figure 4-12. Block Diagram of P50, P52, and P53 WR PU PU5 PU50, PU52, PU53 WR ISC ISC ISC2, ISC3, ISC4 Alternate function RD WR PORT P5 Output latch (P50, P52, P53 PM5 PM50, PM52, PM53 LCD ...

Page 155

WR PU PU5 PU51 RD WR PORT P5 Output latch (P51 PM5 PM51 Alternate function LCD controller/driver WR PF PFALL PF5L P5: Port register 5 PU5: Pull-up resistor option register 5 PM5: Port mode register 5 PFALL: ...

Page 156

WR PU PU5 PU54 to PU57 RD WR PORT P5 Output latch (P54 to P57 PM5 PM54 to PM57 LCD controller/driver WR PF PFALL PF5H P5: Port register 5 PU5: Pull-up resistor option register 5 PM5: Port ...

Page 157

Port 6 P60/SCL0 P61/SDA0 Port I/O port with an output latch. Port 6 can be set to the input mode or output mode in 1-bit units using port mode register 6 (PM6). The output is ...

Page 158

Port 7 P70/KR0 P71/KR1 P72/KR2 P73/KR3 P74/KR4 P75/SCK01 P76/KR6/SI01 P77/KR7/SO01 Port I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 159

WR PU PU7 PU70 to PU74 Alternate function RD WR PORT P7 Output latch (P70 to P74 PM7 PM70 to PM74 P7: Port register 7 PU7: Pull-up resistor option register 7 PM7: Port mode register 7 RD: ...

Page 160

WR PIM PIM7 PIM75 WR PU PU7 PU75 Alternate function RD WR PORT P7 Output latch (P75) WR POM POM7 POM75 WR PM PM7 PM75 Alternate function P7: Port register 7 PU7: Pull-up resistor option register 7 PIM7: Port ...

Page 161

WR PIM PIM7 PIM76 WR PU PU7 PU76 Alternate function RD WR PORT P7 Output latch (P76 PM7 PM76 P7: Port register 7 PU7: Pull-up resistor option register 7 PIM7: Port input mode register 7 PM7: Port ...

Page 162

WR PU PU77 PU77 RD Alternate function WR PORT P7 Output latch (P77) WR POM POM7 POM77 WR PM PM7 PM77 Alternate function P7: Port register 7 PU7: Pull-up resistor option register 7 POM7: Port output mode register 7 ...

Page 163

Port 8 P80/SCK00/INTP11 P81/RxD0/SI00/INTP9 P82/TxD0/SO00 P83 P84/TO10/TI10 P85/TO11/TI11 P86/TO12/TI12 P87/TO13/TI13 Port I/O port with an output latch. Port 8 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 164

WR PU PU8 PU80 RD Alternate function WR PORT P8 Output latch (P80) WR POM POM8 POM80 WR PM PM8 PM80 Alternate function P8: Port register 8 PU8: Pull-up resistor option register 8 POM8: Port output mode register 8 ...

Page 165

WR PU PU8 PU81 Alternate function RD WR PORT P8 Output latch (P81 PM8 PM81 P8: Port register 8 PU8: Pull-up resistor option register 8 PM8: Port mode register 8 RD: Read signal WR××: Write signal R01UH0004EJ0401 ...

Page 166

WR PU PU8 PU82 RD WR PORT P8 Output latch (P82) WR POM POM8 POM82 WR PM PM8 PM82 Alternate function P8: Port register 8 PU8: Pull-up resistor option register 8 POM8: Port output mode register 8 PM8: Port ...

Page 167

PORT WR PM P8: Port register 8 PU8: Pull-up resistor option register 8 PM8: Port mode register 8 RD: Read signal WR××: Write signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-23. Block Diagram of P83 ...

Page 168

WR PU PU8 PU84 to PU87 Alternate function RD WR PORT P8 Output latch (P84 to P87 PM8 PM84 to PM87 Alternate function P8: Port register 8 PU8: Pull-up resistor option register 8 PM8: Port mode register ...

Page 169

Port 9 P90/SEGxx P91/SEGxx P92/SEGxx P93/SEGxx P94/SEGxx P95/SEGxx P96/SEGxx P97/SEGxx Port I/O port with an output latch. Port 9 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 170

WR PU PU9 PU90 to PU93 RD WR PORT P9 Output latch (P90 to P93 PM9 PM90 to PM93 LCD controller/driver WR PF PFALL PF9L P9: Port register 9 PU9: Pull-up resistor option register 9 PM9: Port ...

Page 171

WR PU PU9 PU94 to PU97 RD WR PORT P9 Output latch (P94 to P97 PM9 PM94 to PM97 LCD controller/driver WR PF PFALL PF9H P9: Port register 9 PU9: Pull-up resistor option register 9 PM9: Port ...

Page 172

Port 10 P100/SEGxx P101/SEGxx P102/SEGxx Port I/O port with an output latch. Port 10 can be set to the input mode or output mode in 1-bit units using port mode register 10 (PM10). When the ...

Page 173

WR PU PU10 PU100 to PU102 RD WR PORT P10 Output latch (P100 to P102 PM10 PM100 to PM102 LCD controller/driver WR PF PFALL PF10 P10: Port register 10 PU10: Pull-up resistor option register 10 PM10: Port ...

Page 174

Port 11 P110/ANO0 P111/ANO1 Port I/O port with an output latch. Port 11 can be set to the input mode or output mode in 1-bit units using port mode register 11 (PM11). This port can ...

Page 175

Port 12 P120/INTP0/EXLVI P121/X1 P122/X2/EXCLK P123/XT1 P124/XT2 P120 is a 1-bit I/O port with an output latch. Port 12 can be set to the input mode or output mode in 1-bit units using port mode register 12 (PM12). ...

Page 176

WR PU PU12 PU120 Alternate function RD WR PORT P12 Output latch (P120 PM12 PM120 P12: Port register 12 PU12: Pull-up resistor option register 12 PM12: Port mode register 12 RD: Read signal WR××: Write signal R01UH0004EJ0401 ...

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RD RD CMC: Clock operation mode control register RD: Read signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-30. Block Diagram of P121 and P122 Clock generator CMC OSCSEL CMC EXCLK, OSCSEL CHAPTER 4 PORT FUNCTIONS P122/X2/EXCLK P121/X1 177 ...

Page 178

RD RD CMC: Clock operation mode control register RD: Read signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-31. Block Diagram of P123 and P124 Clock generator CMC OSCSELS CMC OSCSELS CHAPTER 4 PORT FUNCTIONS P124/XT2 P123/XT1 178 ...

Page 179

Port 13 P130 P130 is a port dedicated to 1-bit output and is provided with an output latch. Figure 4-32 shows a block diagram of port 13 PORT P13: Port register 13 RD: Read signal WR××: ...

Page 180

Port 14 P140/SEGxx P141/SEGxx P142/SEGxx P143/SEGxx P144/SEGxx P145/SEGxx P146/SEGxx P147/SEGxx Port I/O port with an output latch. Port 14 can be set to the input mode or output mode in 1-bit units using port mode ...

Page 181

WR PU PU14 PU140 to PU143 RD WR PORT P14 Output latch (P140 to P143 PM14 PM140 to PM143 LCD controller/driver WR PF PFALL PF14L P14: Port register 14 PU14: Pull-up resistor option register 14 PM14: Port ...

Page 182

WR PU PU14 PU144 to PU147 RD WR PORT P14 Output latch (P144 to P147 PM14 PM144 to PM147 LCD controller/driver WR PF PFALL PF14H P14: Port register 14 PU14: Pull-up resistor option register 14 PM14: Port ...

Page 183

Port 15 P150/ANI8/AMP2+ P151/ANI9 P152/ANI10 P157/ANI15/AV REFM Port I/O port with an output latch. Port 15 can be set to the input mode or output mode in 1-bit units using port mode register 15 (PM15). ...

Page 184

Table 4-9. Setting Functions of ANI9/P151 and ANI10/AM152 Pins ADPC register PM15 register Digital I/O Input mode selection Output mode Analog input Input mode selection Output mode Table 4-10. Setting Functions of ANI15/AV ADPC register PM15 register Digital I/O ...

Page 185

RD WR PORT P15 Output latch (P150 PM15 PM150 Operational amplifier (+) input P15: Port register 15 PM15: Port mode register 15 RD: Read signal WR××: Write signal RD WR PORT Output latch (P151, P152 ...

Page 186

RD WR PORT P15 Output latch (P157 PM15 PM157 Operational amplifier (-) input P15: Port register 15 PM15: Port mode register 15 RD: Read signal WR××: Write signal R01UH0004EJ0401 Rev.4.01 Jul 2, 2010 Figure 4-37. Block Diagram ...

Page 187

Registers Controlling Port Function Port functions are controlled by the following eight types of registers. • Port mode registers (PMxx) • Port registers (Pxx) • Pull-up resistor option registers (PUxx) • Port input mode registers (PIMx) • Port ...

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Figure 4-38 Format of Port Mode Register (78K0R/LF3) Symbol PM0 PM1 1 1 PM15 PM2 1 PM26 PM25 PM3 PM4 PM5 PM57 PM56 PM55 PM9 1 1 ...

Page 189

Figure 4-39 Format of Port Mode Register (78K0R/LG3) Symbol PM0 PM1 1 PM16 PM15 PM2 PM27 PM26 PM25 PM3 PM4 PM5 PM57 PM56 PM55 PM6 1 1 ...

Page 190

Figure 4-40 Format of Port Mode Register (78K0R/LH3) Symbol PM0 PM1 PM17 PM16 PM15 PM2 PM27 PM26 PM25 PM3 PM4 PM5 PM57 PM56 PM55 PM6 1 1 ...

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Port registers (Pxx) These registers write the data that is output from the chip when data is output from a port. If the data is read in the input mode, the pin level is read ...

Page 192

Figure 4-41. Format of Port Register (78K0R/LF3) Symbol P15 P2 0 P26 P25 P57 P56 P55 ...

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Figure 4-42. Format of Port Register (78K0R/LG3) Symbol P16 P15 P2 P27 P26 P25 P57 P56 P55 ...

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Figure 4-43. Format of Port Register (78K0R/LH3) Symbol P17 P16 P15 P2 P27 P26 P25 P57 P56 P55 ...

Page 195

Pull-up resistor option registers (PUxx) These registers specify whether the on-chip pull-up resistors are to be used or not. On-chip pull-up resistors can be used in 1-bit units only for the bits set to input mode of the ...

Page 196

Figure 4-45. Format of Pull-up Resistor Option Register (78K0R/LG3) Symbol PU0 PU1 0 PU16 PU15 PU3 PU4 PU5 PU57 PU56 PU55 PU8 PU9 PU97 ...

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Figure 4-46. Format of Pull-up Resistor Option Register (78K0R/LH3) Symbol PU0 PU1 PU17 PU16 PU15 PU3 PU4 PU5 PU57 PU56 PU55 PU7 PU77 PU76 PU75 PU8 PU87 ...

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Port input mode registers (PIMx) PIM1 and PIM7 registers set the input buffer of P10, P11, P14, P15, P75, or P76 in 1-bit units. TTL input buffer can be selected during serial communication with an external device of ...

Page 199

Port output mode registers (POMx) These registers set the output mode of P10 to P15, P75, P77, P80, or P82 in 1-bit units. N-ch open drain output (V tolerance) mode can be selected during serial communication with an ...

Page 200

A/D port configuration register (ADPC) This register switches the ANI15/AV /P157 pins to analog input or digital I/O of port. REFM ADPC can be set by an 8-bit memory manipulation instruction. Reset signal generation sets this register to ...

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