UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 276

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: F01B0H, F01B1H
Address: F01D8H, F01D9H
(5) Timer channel enable status register m (TEm)
Symbol
Symbol
TE0
TE1
TEm is used to enable or stop the timer operation of each channel.
When a bit of timer channel start register m (TSm) is set to 1, the corresponding bit of this register is set to 1.
When a bit of timer channel stop register m (TTm) is set to 1, the corresponding bit of this register is cleared to 0.
TEm can be read by a 16-bit memory manipulation instruction.
The lower 8 bits of TEm can be set with a 1-bit or 8-bit memory manipulation instruction with TEmL.
Reset signal generation clears this register to 0000H.
Remark mn: Unit number + Channel number
mn
TE
15
15
0
1
0
0
m = 0, 1, mn = 00 to 07, 10 to 13
Operation is stopped.
Operation is enabled.
14
14
0
0
Figure 6-9. Format of Timer Channel Enable Status Register m (TEm)
After reset: 0000H
After reset: 0000H
13
13
0
0
12
12
0
0
11
11
0
0
Indication of operation enable/stop status of channel n
R
R
10
10
0
0
9
0
9
0
8
0
8
0
TE07 TE06 TE05 TE04 TE03 TE02 TE01 TE00
7
7
0
6
6
0
CHAPTER 6 TIMER ARRAY UNIT
5
5
0
4
4
0
TE13 TE12 TE11 TE10
3
3
2
2
1
1
0
0
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