UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 290

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: FFF3CH
(13) Input switch control register (ISC)
Symbol
ISC
Remark
Caution Be sure to clear bits 5 to 7 to “0”.
Remarks 1.
ISC is used to implement LIN-bus communication operation with channel 7 of timer array unit 0 in association with
serial array unit 1.
When bit 1 of this register is set to 1, the input signal of the serial data input pin (RxD3) is selected as a timer input
signal.
ISC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
ISC1
pq: Unit number + Channel number (only for channels provided with timer I/O pins)
2.
<3> 78K0R/LH3:
<1> 78K0R/LF3:
<2> 78K0R/LG3:
0
1
7
0
After reset: 00H
• p = 0, q = 0 to 4, 7 (q = 0, 2, 4 for master channel)
• p = 0, q = 0 to 7 (q = 0, 2, 4, 6 for master channel)
• p = 0, q = 0 to 7 (q = 0, 2, 4, 6 for master channel)
• p = 1, q = 0 to 3 (q = 0, 2 for master channel)
When the LIN-bus communication function is used, select the input signal of the RxD3 pin by setting
ISC1 to 1.
Bits 0 and 2 to 4 of ISC are not used with TAU0.
q < r ≤ 7 (where r is a consecutive integer greater than q)
q < r ≤ 7 (where r is a consecutive integer greater than q)
q < r ≤ 7 (where r is a consecutive integer greater than q)
q < r ≤ 3 (where r is a consecutive integer greater than q)
Uses the input signal of the TI07 pin as a timer input (normal operation).
Input signal of R
Figure 6-22. Format of Input Switch Control Register (ISC)
6
0
R/W
X
D3 pin is used as timer input (wakeup signal detection).
5
0
Switching channel 7 input of timer array unit
ISC4
4
ISC3
3
CHAPTER 6 TIMER ARRAY UNIT
ISC2
2
ISC1
1
ISC0
0
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