UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 140

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
4.2.2 Port 1
mode register 1 (PM1). When the P10 to P17 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 1 (PU1).
units using port input mode register 1 (PIM1).
output mode register 1 (POM1).
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Port 1 is an I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port
Input to the P10, P11, P14, and P15 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit
Output from the P10 to P15 pins can be specified as N-ch open-drain output (V
This port can also be used for serial interface clock I/O, data I/O, timer I/O, and external interrupt request input,.
Reset signal generation sets port 1 to input mode.
Figures 4-3 to 4-6 show block diagrams of port 1.
Cautions 1.
P10/SCK20/SCL20
P11/SI20/RxD2/SDA20/INTP6
P12/SO20/TxD2/TO02
P13/SO10/TxD1/TO04
P14/SI10/RxD1/SDA10/INTP4
P15/SCK10/SCL10/INTP7
P16/TI05/TO05/INTP10
P17
2.
3.
4.
5.
To use P10/SCK20/SCL20 and P11/SI20/RxD2/SDA20/INTP6 as a general-purpose port, note the
serial array unit 1 setting. For details, refer to Table 14-9 Relationship Between Register Settings
and Pins (Channel 0 of unit 1: CSI20, UART2 Reception, IIC20).
To use P12/TO02/SO20/TxD2 as a general-purpose port, set bit 2 (TO02) of timer output register 0
(TO0) and bit 2 (TOE02) of timer output enable register 0 (TOE0) to “0”, which is the same as
their default status setting. And as a general-purpose port, note the serial array unit 1 setting.
For details of serial array unit 1 setting, refer to Table 14-9 Relationship Between Register
Settings and Pins (Channel 0 of unit 1: CSI20, UART2 Reception, IIC20).
To use P13/TO04/SO10/TxD1 as a general-purpose port, set bit 4 (TO04) of timer output register 0
(TO0) and bit 4 (TOE04) of timer output enable register 0 (TOE0) to “0”, which is the same as
their default status setting. And as a general-purpose port, note the serial array unit 0 setting.
For details of serial array unit 0 setting, refer to Table 14-7 Relationship Between Register
Settings and Pins (Channel 2 of unit 0: CSI10, UART1 Transmission, IIC10)
To use P14/SI10/RxD1/SDA10/INTP4 and P15/SCK10/SCL10/INTP7 as a general-purpose port,
note the serial array unit 0 setting. For details, refer to Table 14-7 Relationship Between Register
Settings and Pins (Channel 2 of unit 0: CSI10, UART1 Transmission, IIC10)
To use P16/TO05/TI05/INTP10 as a general-purpose port, set bit 5 (TO05) of timer output register
0 (TO0) and bit 5 (TOE05) of timer output enable register 0 (TOE0) to “0”, which is the same as
their default status setting.
(80 pins:
78F1501A, 78F1502A)
78K0R/LF3
μ
PD78F1500A,
(100 pins:
78F1504A, 78F1505A)
78K0R/LG3
μ
PD78F1503A,
CHAPTER 4 PORT FUNCTIONS
DD
tolerance) in 1-bit units using port
(128 pins:
78F1507A, 78F1508A)
78K0R/LH3
μ
PD78F1506A,
140

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