UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 980

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
D/A
converter
Operational
amplifier
Voltage
reference
Function
PER0:
Peripheral
enable register 0
DACSW0,
DACSW1: D/A
conversion value
setting registers
W0 and W1
Operation of D/A
Converter
Operation in
normal mode
Operation in
real-time output
mode
Digital port I/O
function, which
is the alternate
function of the
ANO0, ANO1
pins
Operation of the
D/A converter
continues in the
HALT and STOP
mode
PER0:
Peripheral
enable register 0
OAC:
Operational
amplifier control
register
ADPC: A/D port
configuration
register
PM2, PM15:
Port mode
registers 2 and
15
Single AMP
mode
PER0:
Peripheral
enable register 0
Details of
Function
When setting the D/A converter, be sure to set DACEN to 1 first. If DACEN = 0,
writing to a control register of the D/A converter is ignored, and, even if the register is
read, only the default value is read.
Rewriting DACSWn during A/D conversion is prohibited when both the positive
reference voltage of the A/D converter (AD
the D/A converter (DA
DAREF = 1). Rewrite it when conversion operation is stopped (ADCS = 0).
Even if 1, 0, and then 1 is set to the DACEn bit, there is a wait after 1 is set for the
last time.
If the DACSWn or DACSn register is rewritten during the settling time, D/A
conversion is aborted and reconversion by using the rewritten values starts.
Make the interval between each generation of the INTTM0m signal longer than the
settling time.
conversion is aborted and reconversion starts.
Even if the generation of the INTTM0m signal and rewriting the DACSWn or DACSn
register conflict, the D/A conversion result is output.
The digital port I/O function, which is the alternate function of the ANO0 and ANO1
pins, does not operate during D/A conversion.
When the P11 register is read during D/A conversion, 0 is read in input mode and the
set value of the P11 register is read in output mode. If the digital output mode is set,
no output data is output to pins.
The operation of the D/A converter continues in the HALT and STOP mode. To lower
the power consumption, therefore, clear the DACEn bit of the DAM register to 0 (D/A
conversion stop), and execute HALT or STOP instruction.
When setting operational amplifier, be sure to set ADCEN to 1 first. If ADCEN = 0,
writing to a control register of operational amplifier is ignored, and, even if the register
is read, only the default value is read.
Use the ADPC register to specify as analog inputs the pins to be used with
operational amplifiers.
When using as digital inputs the pins of ports 2 and 15, which are not used with
operational amplifiers, when the operational amplifiers are used, make sure that the
input levels are fixed.
Set pins to be used with operational amplifiers in the input mode by using port mode
registers 2 and 15 (PM2, PM15).
If a pin is set as an analog input port, not the pin level but “0” is always read.
When an operational amplifier is used, AMPn+, AMPn−, and AMPnO pins are used,
so the alternative analog input functions cannot be used. The operational amplifier
output signals, however, can be used as analog inputs.
To use as an input of the A/D converter a voltage that has been amplified in single
amplifier mode, enable operation in single amplifier mode before selecting an analog
input channel by using the ADS register.
When setting voltage reference, be sure to set ADCEN to 1 first. If ADCEN = 0,
writing to a control register of voltage reference is ignored, and, even if the register is
read, only the default value is read.
If an INTTM0m signal is generated during the settling time, D/A
REF
) are the voltage reference output (V
Cautions
REFP
) and the positive reference voltage of
APPENDIX C LIST OF CAUTIONS
REFOUT
) (VRSEL = 1 and
p.425
pp.427
, 429
pp.428
, 429
p.428
p.429
p.429
p.429
p.429
p.432
p.433
p.433
p.434
p.435
pp.436
, 437
p.438
p.440
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980

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