UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 254
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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<R>
78K0R/Lx3
5.6.6 Condition before changing CPU clock and processing after changing CPU clock
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Internal high-
speed
oscillation clock
X1 clock
External main
system clock
Before Change
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
CPU Clock
X1 clock
External main
system clock
Subsystem
clock
20 MHz internal
high-speed
oscillation clock
Internal high-
speed oscillation
clock
External main
system clock
Subsystem
clock
20 MHz internal
high-speed
oscillation clock
Internal high-
speed
oscillation clock
X1 clock
Subsystem
clock
20 MHz internal
high-speed
oscillation clock
After Change
Stabilization of X1 oscillation
• OSCSEL = 1, EXCLK = 0, MSTOP = 0
• After elapse of oscillation stabilization time
Enabling input of external clock from
EXCLK pin
• OSCSEL = 1, EXCLK = 1, MSTOP = 0
Stabilization of X1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Stabilization of DSC oscillation with 20
MHz set by using the option byte
• V
• After elapse of oscillation stabilization
• SELDSC = 1
Oscillation of internal high-speed oscillator
• HIOSTOP = 0
Transition not possible
(To change the clock, set it again after
executing reset once.)
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Transition cannot be performed unless the
clock is changed to the internal high-speed
oscillation clock once.
Oscillation of internal high-speed oscillator
• HIOSTOP = 0
Transition not possible
(To change the clock, set it again after
executing reset once.)
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Transition cannot be performed unless the
clock is changed to the internal high-speed
oscillation clock once.
time (100
DD
Table 5-5. Changing CPU Clock (1/2)
≥ 2.7 V
Condition Before Change
μ
s) after setting to DSCON = 1
Operating current can be reduced by
stopping internal high-speed oscillator
(HIOSTOP = 1).
X1 oscillation can be stopped (MSTOP =
1).
X1 oscillation can be stopped (MSTOP =
1).
External main system clock input can
be disabled (MSTOP = 1).
External main system clock input can
be disabled (MSTOP = 1).
CHAPTER 5 CLOCK GENERATOR
Processing After Change
−
−
−
−
−
−
254
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