UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 241

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(4) Example of setting procedure when stopping the high-speed system clock
<3> If some peripheral hardware macros are not used, supply of the input clock to each hardware macro can be
The high-speed system clock can be stopped (disabling clock input if the external clock is used) in the following two
ways.
• Executing the STOP instruction
• Setting MSTOP to 1
(a) To execute a STOP instruction
<1> Setting to stop peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after STOP mode is released
<3> Executing the STOP instruction
stopped.
(PER0 register)
Remark RTCEN:
RTCEN
xxxEN
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that cannot be
used in STOP mode, see CHAPTER 21 STANDBY FUNCTION).
If the X1 clock oscillates before the STOP mode is entered, set the value of the OSTS register before
executing the STOP instruction.
When the STOP instruction is executed, the system is placed in the STOP mode and X1 oscillation is
stopped (the input of the external clock is disabled).
0
1
DACEN:
ADCEN:
IICAEN:
SAU1EN:
SAU0EN:
TAU1EN:
TAU0EN:
Stops input clock supply.
Supplies input clock.
DACEN
Control of the real-time counter input clock
Control of the D/A converter input clock
Control of the A/D converter and operational amplifier input clock
Control of the serial interface IICA input clock
Control of the serial array unit 1 unit input clock
Control of the serial array unit 0 unit input clock
Control of the timer array unit 1 input clock
Control of the timer array unit 0 input clock
ADCEN
IICAEN
Input clock control
SAU1EN
SAU0EN
CHAPTER 5 CLOCK GENERATOR
TAU1EN
TAU0EN
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