UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 979

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
A/D
converter
Function
Input impedance
of ANI0 to
ANI10, ANI15
pins
AV
impedance
Interrupt request
flag (ADIF)
Conversion
results just after
A/D conversion
start
A/D conversion
result register
(ADCR,
ADCRH) read
operation
Internal
equivalent circuit
Rewriting
DACSWn during
A/D conversion
REFP
Details of
Function
pin input
This A/D converter charges a sampling capacitor for sampling during sampling time.
Therefore, only a leakage current flows when sampling is not in progress, and a
current that charges the capacitor flows during sampling. Consequently, the input
impedance fluctuates depending on whether sampling is in progress, and on the
other states.
To make sure that sampling is effective, however, it is recommended to keep the
output impedance of the analog input source to within 1 kΩ, and to connect a
capacitor of about 100 pF to the ANI0 to ANI10 and ANI15 pins (see Figure 10-26).
A series resistor string of several tens of kΩ is connected between the AV
AV
Therefore, if the output impedance of the reference voltage supply is high, this will
result in a series connection to the series resistor string between the AV
AV
converter.
The interrupt request flag (ADIF) is not cleared even if the analog input channel
specification register (ADS) is changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D
conversion result and ADIF for the pre-change analog input may be set just before
the ADS rewrite. Caution is therefore required since, at this time, when ADIF is read
immediately after the ADS rewrite, ADIF is set despite the fact A/D conversion for the
post-change analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D
conversion operation is resumed.
The first A/D conversion value immediately after A/D conversion starts may not fall
within the rating range if the ADCS bit is set to 1 within 1
set to 1, or if the ADCS bit is set to 1 with the ADCE bit = 0. Take measures such as
polling the A/D conversion end interrupt request (INTAD) and removing the first
conversion result.
When a write operation is performed to A/D converter mode register (ADM), A/D
converter mode register 1 (ADM1), analog input channel specification register (ADS),
and A/D port configuration register (ADPC), the contents of ADCR and ADCRH may
become undefined. Read the conversion result following conversion completion
before writing to ADM, ADM1, ADS, or ADPC. Using a timing other than the above
may cause an incorrect conversion result to be read.
The equivalent
Rewriting DACSWn (n = 0, 1) during A/D conversion is prohibited when both the
positive reference voltage of A/D converter (AD
voltage of the D/A converter (DA
(VRSEL = 1 and DAREF = 1). Rewrite it when conversion operation is stopped
(ADCS = 0).
REFM
REFM
(or AV
(or AV
SS
SS
circuit
) pins.
) pins, resulting in a large reference voltage (AV
of the analog input block is shown below. (See Figure 10-28.)
REF
Cautions
) are the voltage reference output (V
APPENDIX C LIST OF CAUTIONS
REFP
) and the positive reference
μ
s after the ADCE bit was
REF
) error of A/D
REFP
REFP
REFOUT
and
and
)
p.420
p.421
p.421
p.421
p.422
p.422
p.422
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