UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 900

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
AC Characteristics
(1) Basic operation (1/6)
Note
Remarks 1. f
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Instruction cycle (minimum
instruction execution time)
External main system clock
frequency
External main system clock input
high-level width, low-level width
TI00 to TI07, TI10 to TI13 input
high-level width, low-level width
TO00 to TO07, TO10 to TO13
output frequency
PCLBUZ0, PCLBUZ1 output
frequency
Interrupt input high-level width,
low-level width
Key return input low-level width
RESET low-level width
(T
V
A
SS
In low-power-consumption mode, use the regulator with f
= −40 to +85°C, 1.8 V ≤ V
= EV
2. For details on the normal power mode and low consumption power mode according to the regulator
Items
output voltage, refer to CHAPTER 25 REGULATOR.
SS
MCK
(Operation clock to be set by the CKSmn bit of the TMRmn register. m: Unit number (m = 0, 1), n: Channel
number (n = 0 to 7))
= AV
: Timer array unit operation clock frequency
SS
= 0 V)
T
f
t
t
t
f
f
t
t
t
t
EX
EXH
TIH
TIL
TO
PCL
INTH
INTL
KR
RSL
Symbol
CY
DD
,
, t
,
= EV
EXL
DD
Main
system
clock (f
operation
Subsystem
clock (f
operation
In the self
programmin
g mode
2.7 V ≤ V
1.8 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
≤ 5.5 V, 1.8 V ≤ AV
MAIN
SUB
DD
DD
DD
DD
DD
DD
DD
DD
)
)
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
Normal power
mode,
FSEL = 1
Normal power
mode,
FSEL = 0
Low consumption power mode
SDIV = 1
SDIV = 0
Normal power
mode,
FSEL = 1
Low consumption power mode
Conditions
DD0
CLK
CHAPTER 31 ELECTRICAL SPECIFICATIONS
2.7 V ≤ V
1.8 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
fixed to 1 MHz when executing self programming.
≤ V
DD
, 1.8 V ≤ AV
DD
DD
DD
DD
DD
DD
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
Note
2/f
MIN.
0.05
57.2
28.5
0.05
0.88
+10
250
0.2
0.1
0.2
0.2
2.0
2.0
24
96
10
1
1
DD1
MCK
≤ V
DD
TYP.
30.5
61
1
,
MAX.
62.5
31.3
1.15
20.0
5.0
10
10
8
8
8
8
8
1
1
5
5
MHz
MHz
MHz
MHz
MHz
MHz
Unit
μ
μ
μ
μ
μ
μ
μ
μ
μ
μ
ns
ns
ns
μ
ns
μ
s
s
s
s
s
s
s
s
s
s
s
s
900