UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 574

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
14.8 Processing Procedure in Case of Error
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Sets STmn bit to 1.
Synchronization with other party of
communication
Sets SSmn bit to 1.
The processing procedure to be followed if an error of each type occurs is described in Figures 14-100 to 14-102.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
Software Manipulation
Software Manipulation
Figure 14-100. Processing Procedure in Case of Parity Error or Overrun Error
Figure 14-101. Processing Procedure in Case of Framing Error
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
SEmn = 0, and channel n stops
operation.
SEmn = 1, and channel n is enabled to
operate.
Hardware Status
Hardware Status
CHAPTER 14 SERIAL ARRAY UNIT
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read
from the SSRmn register to the
SIRmn register without modification.
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read
from the SSRmn register to the
SIRmn register without modification.
Synchronization with the other party
of communication is re-established
and communication is resumed
because it is considered that a
framing error has occurred because
the start bit has been shifted.
Remark
Remark
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