UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 833

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Cautions 3. In low-power consumption mode, use the regulator with f
Low-power
consumption mode
Normal power mode
Mode
4. A wait is required to change the operation speed mode control register (OSMC) after
self programming.
changing the RMC register.
consumption mode and 10
procedure shown below.
• When setting to low-power consumption mode
• When setting to normal power mode
<1> Select a frequency of 1 MHz for f
<2> Set RMC to 5AH (set the regulator to low-power consumption mode).
<3> Wait for 2 ms.
<4> Set FLPC and FSEL of OSMC to 1 and 0, respectively.
<1> Set RMC to 00H (set the regulator to normal power mode).
<2> Wait for 10
<3> Change FLPC and FSEL of OSMC.
<4> Change the f
1.8 V
2.4 V
Output Voltage
Table 25-1. Regulator Output Voltage Conditions
μ
s.
CLK
frequency.
In STOP mode (except during OCD mode)
When both the high-speed system clock (f
oscillation clock (f
(f
When both the high-speed system clock (f
oscillation clock (f
(f
subsystem clock (f
Other than above
IH20
IH20
) are stopped during CPU operation with the subsystem clock (f
) are stopped during the HALT mode when the CPU operation with the
μ
s when setting to normal power mode, as described in the
Wait for 2 ms by software when setting to low-power
CLK
IH
IH
SUB
), and the 20 MHz internal high-speed oscillation clock
), and the 20 MHz internal high-speed oscillation clock
.
) has been set
Condition
CLK
MX
MX
), the high-speed internal
), the high-speed internal
fixed to 1 MHz when executing
CHAPTER 25 REGULATOR
SUB
)
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