UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 429

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
78K0R/Lx3
11.5 Cautions for D/A Converter
(1) The digital port I/O function, which is the alternate function of the ANO0 and ANO1 pins, does not operate during D/A
(2) The operation of the D/A converter continues in the HALT and STOP mode. To lower the power consumption,
(3) Rewriting DACSWn (n = 0, 1) during A/D conversion is prohibited when both the positive reference voltage of the A/D
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
<6> Set the DACEn bit of the DAM register to 1 (D/A conversion enable).
<7> Set the DAMDn bit of the DAM register to 1 (real-time output mode).
<8> Operate timer channel m.
<9> Generation of the INTTM0m signals starts D/A conversion and the D/A converted analog voltage value will be
<10> Afterward, the value set to the DACSWn or DACSn register will be output at the generation timing of the
Cautions 1. Even if 1, 0, and then 1 is set to the DACEn bit, there is a wait after 1 is set for the last time.
Remark n = 0, 1
Observe the following cautions when using the D/A converter.
Remark n = 0, 1, m = 4, 5
conversion.
When the P11 register is read during D/A conversion, 0 is read in input mode and the set value of the P11 register is
read in output mode. If the digital output mode is set, no output data is output to pins.
therefore, clear the DACEn bit of the DAM register to 0 (D/A conversion stop), and execute HALT or STOP instruction.
converter (AD
(V
REFOUT
After the wait time (20
elapses, the D/A converted analog voltage value is output from the ANOn pin.
Steps <1> to <7> above constitute the initial settings.
output from the ANOn pin after a settling time (18
INTTM0m signals.
Set the analog voltage value to be output to the ANOn pin, to the DACSWn or DACSn register before performing
the next D/A conversion (INTTM0m signal are generated).
When the DACEn bit of the DAM register is set to 0 (D/A conversion operation stop), D/A conversion stops, the
ANOn pin goes into a high-impedance state when the PM11n bit of the PM11 register = 1 (input mode), and the
ANOn pin outputs the set value of the P11 register when the PM11n bit = 0 (output mode).
) (VRSEL = 1 and DAREF = 1). Rewrite it when conversion operation is stopped (ADCS = 0).
2. Make the interval between each generation of the INTTM0m signal longer than the settling time. If
3. Even if the generation of the INTTM0m signal and rewriting the DACSWn or DACSn register
an INTTM0m signal is generated during the settling time, D/A conversion is aborted and
reconversion starts.
conflict, the D/A conversion result is output.
REFP
) and the positive reference voltage of the D/A converter (DA
μ
s or more) elapses, D/A conversion starts, and then, after the settling time (18
μ
s (max.)) has elapsed.
CHAPTER 11 D/A CONVERTER
REFP
) are the voltage reference output
μ
s (max.))
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