UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 88

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
(4) On-chip debug security ID setting area
3.1.2 Mirror area
FFFFFH (the data flash area to be mirrored is set by the processor mode control register (PMC)).
to 0FFFFH or 10000H to 1FFFFH, to F0000H to FFFFFH (the data flash area to be mirrored is set by the processor mode
control register (PMC)).
used, and thus the contents of the data flash can be read with the shorter code. However, the data flash area is not
mirrored to the SFR, extended SFR, RAM, and use prohibited areas.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The
The
By reading data from F0000H to FFFFFH, an instruction that does not have the ES registers as an operand can be
The mirror area can only be read and no instruction can be fetched from this area.
A 10-byte area of 000C4H to 000CDH and 010C4H to 010CDH can be used as an on-chip debug security ID setting
area. Set the on-chip debug security ID of 10 bytes at 000C4H to 000CDH when the boot swap is not used and at
000C4H to 000CDH and 010C4H to 010CDH when the boot swap is used. For details, see CHAPTER 28 ON-CHIP
DEBUG FUNCTION.
μ
μ
PD78F1501A, 78F1502A, 78F1504A, 78F1505A, 78F1507A, and 78F1508A mirror the data flash area of 00000H
PD78F1500A, 78F1503A, and 78F01506A mirror the data flash area of 00000H to 0FFFFH, to F0000H to
CHAPTER 3 CPU ARCHITECTURE
88

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