UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 103

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

that order, the IE flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to
the PC, and execution branches.
the interrupt is acknowledged after the instruction under execution is complete. Figure 8-7 shows an example of the
interrupt request acknowledgment timing for an 8-bit data transfer instruction MOV A, r. Since this instruction is
executed for 4 clocks, if an interrupt occurs for 3 clocks after the instruction fetch starts, the interrupt acknowledgment
processing is performed after the MOV A, r instruction is executed.
Figure 8-6 shows the algorithm of interrupt request acknowledgment.
When a maskable interrupt request is acknowledged, the contents of the PSW and PC are saved to the stack in
To return from interrupt servicing, use the RETI instruction.
IE:
If an interrupt request flag (
IF:
MK:
Interrupt
Clock
CPU
Interrupt request flag
Interrupt mask flag
Flag to control maskable interrupt request acknowledgment (1 = enable, 0 = disable)
Figure 8-7. Interrupt Request Acknowledgment Timing (Example of MOV A, r)
Figure 8-6. Interrupt Request Acknowledgment Processing Algorithm
No
IF) is set before an instruction clock n (n = 4 to 10) under execution becomes n
MOV A, r
CHAPTER 8 INTERRUPT FUNCTIONS
Vectored interrupt
Preliminary User’s Manual U18681EJ1V0UD
servicing
IE = 1?
MK = 0?
Start
IF = 1?
Yes (Interrupt request generated)
Yes
Yes
Saving PSW and PC, jump
No
No
to interrupt servicing
8 clocks
Interrupt request pending
Interrupt request pending
Interrupt servicing program
103
1,