UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 91

8BIT MCU, 4K FLASH, 128B RAM, SMD

UPD78F9502MA-CAC-A

Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F9502MA-CAC-A

Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
(2) Watchdog timer enable register (WDTE)
Address: FF49H
Symbol
WDTE
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH.
Cautions 2. After reset is released, WDTM can be written only once by an 8-bit memory
Remarks 1. f
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated.
7
After reset: 9AH
3. WDTM cannot be set by a 1-bit memory manipulation instruction.
4. When using the flash memory self programming by self writing, set the overflow time
2. f
3.
4. Figures in parentheses apply to operation at f
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset
3. The value read from WDTE is 9AH (this differs from the written value (ACH)).
Figure 7-3. Format of Watchdog Timer Enable Register (WDTE)
RL
X
manipulation instruction. If writing is attempted a second time, an internal reset
signal is generated. However, at the first write, if “1” and “x” are set for WDCS4 and
WDCS3 respectively and the watchdog timer is stopped, then the internal reset
signal does not occur even if the following are executed.
for the watchdog timer so that enough everflow time is secured (Example 1-byte
writing: 200 s MIN., 1-block deletion: 10 ms MIN.).
signal is generated.
:
: System clock oscillation frequency
: Low-speed internal oscillation clock oscillation frequency
Second write to WDTM
1-bit memory manipulation instruction to WDTE
Writing of a value other than “ACH” to WDTE
6
Don’t care
R/W
5
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 7 WATCHDOG TIMER
4
3
RL
= 480 kHz (MAX.), f
2
1
X
= 10 MHz.
0
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