UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 112

8BIT MCU, 4K FLASH, 128B RAM, SMD

UPD78F9502MA-CAC-A

Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F9502MA-CAC-A

Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
112
(2) STOP mode release
Note Only when sets count clock to f
System clock
CPU clock
oscillation
Note The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
The STOP mode can be released by the following two sources.
Note The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
Remark The broken lines indicate the case when the interrupt request that has released the standby mode
(a) Release by unmasked interrupt request
When an unmasked interrupt request (8-bit timer H1, low-voltage detector, external interrupt request) is
generated, the STOP mode is released. After the oscillation stabilization time has elapsed, if interrupt
acknowledgment is enabled, vectored interrupt servicing is carried out. If interrupt acknowledgment is
disabled, the next address instruction is executed.
Standby release
System clock
STOP mode
CPU status
oscillation
is acknowledged.
STOP mode
signal
is released.
Figure 9-4. STOP Mode Release by Interrupt Request Generation
Figure 9-3. Operation Timing When STOP Mode Is Released
Oscillation
Operation
stops
Operation
mode
Note
instruction
STOP
.
RL
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 9 STANDBY FUNCTION
High-speed internal oscillation clock or external clock input
/2
7
STOP mode
Oscillation stops.
Interrupt
request
Operation
stops
Note
.
Operation mode
Oscillation

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