UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 110

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

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(2) HALT mode release
The HALT mode can be released by the following two sources.
(a) Release by unmasked interrupt request
(b) Release by reset signal generation
When an unmasked interrupt request is generated, the HALT mode is released. If interrupt
acknowledgement is enabled, vectored interrupt servicing is carried out. If interrupt acknowledgement is
disabled, the next address instruction is executed.
Remarks 1. The broken lines indicate the case when the interrupt request which has released the
When the reset signal is input, HALT mode is released, and then, as in the case with a normal reset
operation, the program is executed after branching to the reset vector address.
Note Operation is stopped (277 s (MIN.), 544 s (TYP.), 1.075 ms (MAX.)) because the option byte is
Status of CPU
System clock
release signal
Reset signal
System clock
CPU status
oscillation
oscillation
Standby
referenced.
2. The wait time is as follows:
Figure 9-1. HALT Mode Release by Interrupt Request Generation
standby mode is acknowledged.
• When vectored interrupt servicing is carried out: 11 to 13 clocks
• When vectored interrupt servicing is not carried out: 3 to 5 clocks
Operating mode
Figure 9-2. HALT Mode Release by Reset Signal Generation
Operation
mode
instruction
HALT
instruction
HALT
Oscillates
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 9 STANDBY FUNCTION
HALT mode
HALT mode
Interrupt
request
Oscillation
period
Reset
Oscillation stops
Wait
Wait
Operation
stops
Note
Operating mode
Operation mode
Oscillates