UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 192

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

15.2 Operation List
192
Notes 1. Except r = A.
Remark One instruction clock cycle is one CPU clock cycle (f
MOV
XCH
Mnemonic
2. Except r = A, X.
(PCC).
r, #byte
saddr, #byte
sfr, #byte
A, r
r, A
A, saddr
saddr, A
A, sfr
sfr, A
A, !addr16
!addr16, A
PSW, #byte
A, PSW
PSW, A
A, [DE]
[DE], A
A, [HL]
[HL], A
A, [HL + byte]
[HL + byte], A
A, X
A, r
A, saddr
A, sfr
A, [DE]
A, [HL]
A, [HL, byte]
Operand
Note 1
Note 1
Note 2
CHAPTER 15 INSTRUCTION SET OVERVIEW
Preliminary User’s Manual U18681EJ1V0UD
Bytes
3
3
3
2
2
2
2
2
2
3
3
3
2
2
1
1
1
1
2
2
1
2
2
2
1
1
2
Clocks
6
6
6
4
4
4
4
4
4
8
8
6
4
4
6
6
6
6
6
6
4
6
6
6
8
8
8
(saddr)
r
(saddr)
sfr
A
r
A
A
sfr
A
(addr16)
PSW
A
PSW
A
(DE)
A
(HL)
A
(HL + byte)
A
A
A
A
A
A
A
byte
A
r
(saddr)
sfr
(addr16)
PSW
(DE)
(HL)
(HL + byte)
X
r
(saddr)
sfr
(DE)
(HL)
(HL + byte)
byte
A
CPU
A
A
byte
A
byte
A
) selected by the processor clock control register
A
A
Operation
Z
Flag
AC CY