UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 13

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

1.1 Features
O 78K0S CPU core
O ROM and RAM capacities
O Minimum instruction execution time: 0.2 s (with 10 MHz@4.0 to 5.5 V operation)
O Clock
O I/O ports: 8 (CMOS I/O: 7, CMOS input: 1)
O Timer: 2 channels
O On-chip power-on-clear (POC) circuit (A reset is automatically generated when the voltage drops to 2.1 V ±0.1 V
O On-chip low voltage detector (LVI) circuit (An interrupt/reset (selectable) is generated when the detection voltage
O Single-power-supply flash memory
O Safety function
O Assembly and C language supported
O Enhanced development environment
O Supply voltage: V
O Operating temperature range: T
or below)
is reached)
Part number
High-speed system clock … Selected from the following two sources
Low-speed internal oscillator 240 kHz (TYP.) … Watchdog timer, timer clock in intermittent operation
8-bit timer:
Watchdog timer:
Detection voltage: Selectable from ten levels between 2.35 and 4.3 V
Flash self programming enabled
Software protection function: Protected from outside party copying (no flash reading command)
Time required for writing by dedicated flash memory programmer: Approximately 3 seconds (4 KB)
Watchdog timer operated by clock independent from CPU
Supply voltage drop detectable by LVI
Equipped with option byte function
Support for full-function emulator (IECUBE), simplified emulator (MINICUBE2), and simulator
Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (V
(POC) circuit is 2.1 V 0.1 V.
PD78F9500
PD78F9501
PD78F9502
Write operations on mass production lines supported
- External clock:
- High-speed internal oscillator:
… A hang-up can be detected even if the system clock stops
… Appropriate processing can be executed before the supply voltage drops below the operation voltage
… Important system operation settings set in hardware
DD
= 2.0 to 5.5 V
Item
1 KB
2 KB
4 KB
1 channel … PWM output
1 channel … Operable with low-speed internal oscillation clock
A
= 40 to +85 C
Program Memory (Flash Memory)
Preliminary User’s Manual U18681EJ1V0UD
1 to 10 MHz
8 MHz 2%
CHAPTER 1 OVERVIEW
1
128 bytes
Memory (Internal High-Speed RAM)
POC
) of the power-on-clear
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