UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 104

8BIT MCU, 4K FLASH, 128B RAM, SMD

UPD78F9502MA-CAC-A

Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F9502MA-CAC-A

Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
starts after the next instruction is executed.
set at the second clock of NOP (2-clock instruction). In this case, the MOV A, r instruction after the NOP instruction is
executed, and then the interrupt acknowledgment processing is performed.
8.4.2
being serviced, the interrupt mask function must be used to mask interrupts for which a low priority is to be set.
104
Figure 8-8.
If an interrupt request flag (
Figure 8-8 shows an example of the interrupt request acknowledgment timing for an interrupt request flag that is
Caution Interrupt requests will be held pending while the interrupt request flag register 0 (IF0) or
In order to perform multiple interrupt servicing in which another interrupt is acknowledged while an interrupt is
Interrupt
Multiple interrupt servicing
Clock
CPU
interrupt mask flag register 0 (MK0) are being accessed.
Interrupt Request Acknowledgment Timing (When Interrupt Request Flag Is Set at Last
Clock During Instruction Execution)
NOP
IF) is set at the last clock of the instruction, the interrupt acknowledgment processing
CHAPTER 8 INTERRUPT FUNCTIONS
Preliminary User’s Manual U18681EJ1V0UD
MOV A, r
Saving PSW and PC, jump
to interrupt servicing
8 clocks
servicing
Interrupt
program

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