UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 225

8BIT MCU, 4K FLASH, 128B RAM, SMD

UPD78F9502MA-CAC-A

Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F9502MA-CAC-A

Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
Power-
on-clear
circuit
Low-
voltage
detector
Option
byte
Function
Functions of
power-on-clear
circuit
Cautions for
power-on-clear
circuit
LVIM: Low-
voltage detect
register
LVIS: Low-
voltage
detection level
select register
When used as
reset
Cautions for
low-voltage
detector
Control of
RESET pin
Selection of
system clock
source
Details of
Function
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
If an internal reset signal is generated in the POC circuit, the reset control flag
register (RESF) is cleared to 00H.
Because the detection voltage (V
V, use a voltage in the range of 2.2 to 5.5 V.
In a system where the supply voltage (V
vicinity of the POC detection voltage (V
and released from the reset status. In this case, the time from release of reset to
the start of the operation of the microcontroller can be arbitrarily set by taking the
following action.
To stop LVI, follow either of the procedures below.
Be sure to set bits 2 to 6 to 0.
Bits 4 to 7 must be set to 0.
If a value other than the above is written during LVI operation, the value becomes
undefined at the very moment it is written, and thus be sure to stop LVI (bit
7(LVION) = 0 on the LVIM register) before writing.
<1> must always be executed. When LVIMK = 0, an interrupt may occur
immediately after the processing in <3>.
If supply voltage (V
reset signal is not generated.
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
on how the low-voltage detector is used.
<1> When used as reset
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
When used as an input-only port (P34), the setting of the on-chip pull-up resistor
can be done by PU34 on PU3 register.
Because the EXCLK pin is also used as the P23 pin, the condition under which
the EXCLK pin can be used differ depending on the selected system clock
source.
(1) External clock input is selected
Because the pin is used as an external clock input pin, P23 cannot be used as an
I/O port pin.
(2) High-speed internal oscillation clock is selected
P23 pin can be used as an I/O port pin.
When using 8-bit manipulation instruction: Write 00H to LVIM.
When using 1-bit memory manipulation instruction: Clear LVION to 0.
Preliminary User’s Manual U18681EJ1V0UD
APPENDIX C LIST OF CAUTIONS
DD
)
detection voltage (V
POC
) of the POC circuit is in a range of 2.1 V 0.1
Cautions
LVI
POC
), the operation is as follows depending
DD
DD
) fluctuates for a certain period in the
) fluctuates for a certain period in the
), the system may be repeatedly reset
LVI
) when LVIM is set to 1, an internal
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