UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 42

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

3.4.2 Short direct addressing
42
[Function]
[Description example]
[Illustration]
The memory to be manipulated in the fixed space is directly addressed with the 8-bit data in an instruction word.
The fixed space where this addressing is applied is the 160-byte space FE80H to FF1FH (FE80H to FEFFH
(internal high-speed RAM) + FF00H to FF1FH (special function registers)).
The SFR area where short direct addressing is applied (FF00H to FF1FH) is a part of the total SFR area. In this
area, ports which are frequently accessed in a program and a compare register of the timer counter are mapped,
and these SFRs can be manipulated with a small number of bytes and clocks.
When 8-bit immediate data is at 80H to FFH, bit 8 of an effective address is cleared to 0. When it is at 00H to
1FH, bit 8 is set to 1. See [Illustration] below.
EQU DATA1 0FE90H ; DATA1 shows FE90H of a saddr area,
MOV DATA1, #50H
Effective
address
Identifier
saddrp
15
saddr
When 8-bit immediate data is 20H to FFH,
When 8-bit immediate data is 00H to 1FH,
7
1
Instruction code
1
1
saddr-offset
OP code
Label or FE80H to FF1FH immediate data
Label or FE80H to FF1FH immediate data (even address only)
1
; When setting the immediate data to 50H
1
1
1
1
0
1
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 3 CPU ARCHITECTURE
0
1
1
0
8
1
0
0
Description
1
1
1
= 1.
= 0.
0
0
0
1
0
0
0
0
0
0
1
0
0
OP code
90H (saddr-offset)
50H (immediate data)
Short direct memory