UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 193

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

Note Only when rp = BC, DE, or HL.
Remark
MOVW
XCHW
ADD
ADDC
SUB
Mnemonic
One instruction clock cycle is one CPU clock cycle (f
(PCC).
rp, #word
AX, saddrp
saddrp, AX
AX, rp
rp, AX
AX, rp
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
Operand
Note
Note
Note
CHAPTER 15 INSTRUCTION SET OVERVIEW
Preliminary User’s Manual U18681EJ1V0UD
Bytes
3
2
2
1
1
1
2
3
2
2
3
1
2
2
3
2
2
3
1
2
2
3
2
2
3
1
2
Clocks
6
6
8
4
4
8
4
6
4
4
8
6
6
4
6
4
4
8
6
6
4
6
4
4
8
6
6
rp
AX
(saddrp)
AX
rp
AX
(saddr), CY
A, CY
A, CY
(saddr), CY
A, CY
A, CY
(saddr), CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
A, CY
word
AX
(saddrp)
rp
rp
CPU
A + byte
A + r
A + (saddr)
A + (addr16)
A + (HL)
A + (HL + byte)
A + byte + CY
A + r + CY
A + (saddr) + CY
A + (addr16) + CY
A + (HL) + CY
A + (HL + byte) + CY
A
A
A
A
A
A
) selected by the processor clock control register
AX
byte
r
(saddr)
(addr16)
(HL)
(HL + byte)
(saddr) + byte
(saddr) + byte + CY
(saddr)
Operation
byte
Z
Flag
AC CY
193