UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 36

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

Notes 1. Retained only after a reset by LVI.
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0S,
36
FF50H
FF51H
FF52H,
FF53H
FF54H
FF55H
to
FF57H
FF58H
FF59H
to
FF6FH
FF70H
FF71H
to
FF9FH
FFA0H
FFA1H
FFA2H
FFA3H
FFA4H
2. Varies depending on the reset cause.
LVIM
LVIS
RESF
LSRCM
TMHMD1 <TMHE
PFCMD
PFS
FLPMC
FLCMD
FLAPL
Symbol
and is defined as an sfr variable using the #pragma sfr directive in the CC78K0S.
REG7 REG6 REG5 REG4 REG3 REG2 REG1 REG0
<LVI
ON>
FLA
P7
1>
7
0
0
0
0
0
0
PRSE
CKS1
FLA
LF4
P6
6
0
0
0
0
2
0
0
Special Function Register (SFR) Name
PRSE
CKS1
FLA
LF3
P5
Table 3-3. Special Function Registers (2/3)
5
0
0
0
0
1
0
0
PRSE
CKS1
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 3 CPU ARCHITECTURE
WDT
FLA
LF2
RF
P4
4
0
0
0
0
0
0
LVIS3 LVIS2 LVIS1 LVIS0
PRSE
TMM
D11
FLA
LF1
P3
3
0
0
0
0
0
RERR
PRSE
FLCM
TMM
WEP
D10
LF0
FLA
D2
P2
2
0
0
0
<TOLE
VCER
FLCM
<LVI
MD>
V1>
FLA
D1
P1
R
1
0
0
0
STOP>
<TOEN
LVIRF
FPRE
FLCM
<LSR
FLSP
<LVI
FLA
RR
D0
F>
P0
1>
M
0
R/W
R/W
R/W
R/W
R/W
W
R
Simultaneously
Number of Bits
1
Manipulated
8
16
After
Reset
00H
00H
00H
00H
00H
Undefined
00H
Undefined
00H
Undefined
Note 1
Note 1
Note 2
124
125
118
149
149
148
151
152
64
78