UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 148

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

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(2) Flash protect command register (PFCMD)
This register is set with an 8-bit memory manipulation instruction.
Reset signal generation makes the contents of this register undefined.
If the application system stops inadvertently due to malfunction caused by noise or program hang-up, an
Writing FLPMC is enabled only when a write operation is performed in the following specific sequence.
<1> Write a specific value to PFCMD (A5H)
<2> Write the value to be set to bit 0 (FLSPM) of the FLPMC (writing in this step is invalid)
operation to write the flash programming mode control register (FLPMC) may have a serious effect on the
system. PFCMD is used to protect FLPMC from being written, so that the application system does not stop
inadvertently.
Address: FFA2H
Symbol
FLPMC
Figure 14-8. Format of Flash Programming Mode Control Register (FLPMC)
Notes 1. Bit 0 (FLSPM) is cleared to 0 when reset is released. The set value of the protect
Cautions 1. Cautions in the case of setting the self programming mode, refer to 14.8.2
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0 The set value of the protect byte
FLSPM
7
0
0
1
2. Bits 2 to 6 (PRSELF0 to PRSELF4) are read-only.
After reset: Undefined
2. Set the CPU clock so that it is 1 MHz or more during self programming.
3. Execute the NOP and HALT instructions immediately after executing a
4. If the clock of the oscillator or an external clock is selected as the system
5. Clear the value of the FLCMD register to 00H immediately before setting self-
byte is read to bits 2 to 6 (PRSELF0 to PRSELF4) after reset is released.
Normal mode
Self-programming mode
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0
This is the normal operation status.
standby status.
Self programming commands can be executed by executing the specific
sequence to change modes while in normal mode.
Set a command, an address, and data to be written, then execute the HALT
instruction to execute self programming.
Cautions on self programming function.
specific sequence to set self-programming mode, then execute self
programming. At this time, the HALT instruction is automatically released
after 10 s (MAX.) + 2 CPU clocks (f
clock, execute the NOP and HALT instructions immediately after executing a
specific sequence to set self-programming mode, wait for 8 µs after
releasing the HALT status, and then execute self programming.
programming mode and normal operation mode.
6
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 14 FLASH MEMORY
Selection of operation mode during self-programming mode
5
Note 1
4
R/W
Note 2
3
Executing the HALT instruction sets
CPU
is read to these bits.
).
2
1
0
FLSPM
0