UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 67
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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(a) The internal reset signal is generated by the power-on clear function on power application, the option byte is
(b) The option byte is referenced and the system clock is selected. Then the high-speed internal oscillation
Remark PCC:
referenced after reset, and the system clock is selected.
clock operates as the system clock.
PPCC: Preprocessor clock control register
Figure 5-7. Status Transition of Default Start by High-Speed internal oscillation
Processor clock control register
Interrupt
HALT
CHAPTER 5 CLOCK GENERATORS
Preliminary User’s Manual U18681EJ1V0UD
instruction
High-speed internal
Clock division ratio
oscillator selected
HALT
power-on clear
variable during
CPU operation
by option byte
Reset by
application
Power
instruction
V
Start with PCC = 02H,
PPCC = 02H
STOP
DD
> 2.1 V 0.1 V
STOP
Interrupt
Reset signal
67
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