UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 88

8BIT MCU, 4K FLASH, 128B RAM, SMD

UPD78F9502MA-CAC-A

Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F9502MA-CAC-A

Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
Notes 1. As long as power is being supplied, low-speed internal oscillator cannot be stopped (except in the reset
88
Watchdog timer clock
source
Operation after reset
Operation mode
selection
Features
Remarks 1. f
2. The conditions under which clock supply to the watchdog timer is stopped differ depending on the clock
period).
source of the watchdog timer.
<1> If the clock source is f
<2> If the clock source is f
2. f
RL
X
When f
In HALT/STOP mode
During oscillation stabilization time
: System clock oscillation frequency
If the CPU clock is f
In HALT/STOP mode
: Low-speed internal oscillation clock oscillation frequency
Table 7-2. Option Byte Setting and Watchdog Timer Operation Mode
Operation starts with the maximum interval (2
Fixed to f
The interval can be changed only once.
The watchdog timer cannot be stopped.
Low-Speed Internal Oscillator Cannot Be Stopped Low-Speed Internal Oscillator Can Be Stopped by Software
X
is stopped
RL
Note 1
.
X
RL
X
, clock supply to the watchdog timer is stopped under the following conditions.
and if f
, clock supply to the watchdog timer is stopped under the following conditions.
Preliminary User’s Manual U18681EJ1V0UD
CHAPTER 7 WATCHDOG TIMER
RL
is stopped by software before execution of the STOP instruction
Option Byte Setting
18
/f
RL
). Operation starts with the maximum interval
(2
The clock selection/interval can be changed only
once.
The watchdog timer can be stopped
18
Selectable by software (f
When reset is released: f
/f
RL
).
X
RL
, f
RL
or stopped)
Note 2
.

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