UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 125

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

(2) Low-voltage detection level select register (LVIS)
This register selects the low-voltage detection level.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H
Address: FF51H, After reset: 00H
Symbol
LVIS
Note For a reset by LVI, the value of LVIS is not initialized.
Caution 1. Bits 4 to 7 must be set to 0.
LVIS3
Figure 12-3. Format of Low-Voltage Detection Level Select Register (LVIS)
7
0
0
0
0
0
0
0
0
0
1
1
2. If a value other than the above is written during LVI operation, the value becomes
undefined at the very moment it is written, and thus be sure to stop LVI (bit
7(LVION) = 0 on the LVIM register) before writing.
LVIS2
Other than above
6
0
0
0
0
0
1
1
1
1
0
0
Note
R/W
CHAPTER 12 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U18681EJ1V0UD
LVIS1
5
0
0
0
1
1
0
0
1
1
0
0
Note
LVIS0
.
4
0
0
1
0
1
0
1
0
1
0
1
V
V
V
V
V
V
V
V
V
V
Setting prohibited
LVI0
LVI1
LVI2
LVI3
LVI4
LVI5
LVI6
LVI7
LVI8
LVI9
LVIS3
(4.3 V ±0.2 V)
(4.1 V ±0.2 V)
(3.9 V ±0.2 V)
(3.7 V ±0.2 V)
(3.5 V ±0.2 V)
(3.3 V ±0.15 V)
(3.1 V ±0.15 V)
(2.85 V ±0.15 V)
(2.6 V ±0.1 V)
(2.35 V ±0.1 V)
3
LVIS2
2
Detection level
LVIS1
1
LVIS0
0
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