UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 87

• Manufacturer Part Number: UPD78F9502MA-CAC-A
• Description: 8BIT MCU, 4K FLASH, 128B RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F9502MA-CAC-A

• Controller Family/series: UPD78F
• No. Of I/o's: 8
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

7.1
signal is generated.
For details of RESF, see CHAPTER 10 RESET FUNCTION.
low-speed internal oscillator as shown in Table 7-2.
The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1.
The operation mode of the watchdog timer (WDT) is switched according to the option byte setting of the on-chip
Functions of Watchdog Timer
Remarks 1. f
2
2
2
2
2
2
2
2
During Low-Speed Internal oscillation Clock Operation
11
12
13
14
15
16
17
18
/f
/f
/f
/f
/f
/f
/f
/f
RL
RL
RL
RL
RL
RL
RL
RL
(4.27 ms)
(8.53 ms)
(17.07 ms)
(34.13 ms)
(68.27 ms)
(136.53 ms)
(273.07 ms)
(546.13 ms)
2. f
3. Figures in parentheses apply to operation at f
RL
X
: System clock oscillation frequency
: Low-speed internal oscillation clock oscillation frequency
Table 7-1. Loop Detection Time of Watchdog Timer
CHAPTER 7 WATCHDOG TIMER
Preliminary User’s Manual U18681EJ1V0UD
Loop Detection Time
2
2
2
2
2
2
2
2
13
14
15
16
17
18
19
20
/f
/f
/f
/f
/f
/f
/f
/f
X
X
X
X
X
X
X
X
(819.2 s)
(1.64 ms)
(3.28 ms)
(6.55 ms)
(13.11 ms)
(26.21 ms)
(52.43 ms)
(104.86 ms)
RL
During System Clock Operation
= 480 kHz (MAX.), f
X
= 10 MHz.
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