NS32FX164AV-25 National Semiconductor, NS32FX164AV-25 Datasheet - Page 15

• Manufacturer Part Number: NS32FX164AV-25
• Description: IC IMAGING COMM SGNL PROC PLCC68
• Manufacturer: National Semiconductor

Specifications of NS32FX164AV-25

• Processor Type: Advanced Imaging/Communications Signal Processor SIAP™
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NS32FX164AV-25; Q1284286

2 0 Architectural Description
ENCODING
Register
00000
00001
00010
00011
00100
00101
00110
00111
Register Relative
01000
01001
01010
01011
01100
01101
01110
01111
Memory Relative
10000
10001
10010
Reserved
10011
Immediate
10100
Absolute
10101
External
10110
Top Of Stack
10111
Memory Space
11000
11001
11010
11011
Scaled Index
11100
11101
11110
11111
MODE
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Register 0 relative
Register 1 relative
Register 2 relative
Register 3 relative
Register 4 relative
Register 5 relative
Register 6 relative
Register 7 relative
Frame memory relative
Stack memory relative
Static memory relative
(Reserved for Future Use)
Immediate
Absolute
External
Top of stack
Frame memory
Stack memory
Static memory
Program memory
Index bytes
Index words
Index double words
Index quad words
TABLE 2-1 NS32FX164 Addressing Modes
(Continued)
R0 or F0
R1 or F1
R2 or F2
R3 or F3
R4 or F4
R5 or F5
R6 or F6
R6 or F7
disp(R0)
disp(R1)
disp(R2)
disp(R3)
disp(R4)
disp(R5)
disp(R6)
disp(R7)
disp2(disp1 (FP))
disp2(disp1 (SP))
disp2(disp1 (SB))
value
EXT (disp1)
TOS
disp(FP)
disp(SP)
disp(SB)
mode Rn B
mode Rn W
mode Rn D
mode Rn Q
ASSEMBLER SYNTAX
a
15
disp
disp
a
disp2
EFFECTIVE ADDRESS
None Operand is in the specified
register
Disp
Disp2
address Disp 1
is either SP0 or SP1 as selected
in PSR
None Operand is input from
instruction queue
Disp
Disp2
at Link Table Entry number Disp1
Top of current stack using either
User or Interrupt Stack Pointer
as selected in PSR Automatic
Push Pop included
Disp
SP0 or SP1 as selected in PSR
EA (mode)
EA (mode)
EA (mode)
EA (mode)
‘‘Mode’’ and ‘‘n’’ are contained
within the Index Byte
EA (mode) denotes the effective
address generated using mode
a
a
a
a
Register
Register ‘‘SP’’ is either
Pointer Pointer found at
Pointer Pointer is found
a
a
a
a
Rn
2
4
8
a
c
c
c
Rn
Rn
Rn
Register ‘‘SP’’