NS32FX164AV-25 National Semiconductor, NS32FX164AV-25 Datasheet - Page 7

• Manufacturer Part Number: NS32FX164AV-25
• Description: IC IMAGING COMM SGNL PROC PLCC68
• Manufacturer: National Semiconductor

Specifications of NS32FX164AV-25

• Processor Type: Advanced Imaging/Communications Signal Processor SIAP™
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NS32FX164AV-25; Q1284286

2-1 shows the NS32FX164 internal registers
1 0 Product Introduction
Below is a summary of the instructions that are directly ap-
plicable to graphics along with their intended use
2 0 Architectural Description
2 1 REGISTER SET
The NS32FX164 has 32 internal registers 17 of these regis-
ters belong to the CPU portion of the device and are ad-
dressed either implicitly by specific instructions or through
the register addressing mode The other 15 control the op-
eration of the DSP Module and are memory mapped Figure
Instruction
BBAND
BBOR
BBFOR
BBXOR
BBSTOD
BITWT
EXTBLT
MOVMP
TBITS
SBITS
SBITPS
SBIT
CBIT
TBIT
IBIT
INDEX
The BITBLT group of instructions provide a
method of quickly imaging characters
creating patterns windowing and other
block oriented effects
Move Multiple Pattern is a very fast
instruction for clearing memory and drawing
patterns and lines
Test Bit String will measure the length of 1’s
or 0’s in an image supporting many data
compression methods (RLL) TBITS may
also be used to test for boundaries of
images
Set Bit String is a very fast instruction for
filling objects outline characters and
drawing horizontal lines
The TBITS and SBITS instructions support
Group 3 and Group 4 CCITT standards for
compression and decompression
algorithms
Set Bit Perpendicular String is a very fast
instruction for drawing vertical horizontal
and 45 lines
In printing applications SBITS and SBITPS
may be used to express portrait and
landscape respectively from the same
compressed font data The size of the
character may be scaled as it is drawn
The Bit group of instructions enable single
pixels anywhere in memory to be set
cleared tested or inverted
The INDEX instruction combines a multiply-
add sequence into a single instruction This
provides a fast translation of an X-Y
address to a pixel relative address
Application
(Continued)
7
2 1 1 General Purpose Registers
There are eight registers (R0– R7) used for satisfying the
high speed general storage requirements such as holding
temporary variables and addresses The general purpose
registers are free for any use by the programmer They are
32 bits in length If a general purpose register is specified for
an operand that is 8 or 16 bits long only the low part of the
register is used the high part is not referenced or modified
FIGURE 2-1 NS32FX164 Internal Registers
Peripherals Registers
General Purpose
A
CPU Registers
DSP Module
INTBASE
SP0 SP1
Address
REPEAT
PARAM
32 Bits
R0– R7
Processor Status
PC
SB
FP
Y
X
Z
Configuration
DSPMASK
NMISTAT
CLSTAT
DSPINT
ABORT
CLPTR
EABR
MOD
PSR
OVF
EXT
CFG