NS32FX164AV-25 National Semiconductor, NS32FX164AV-25 Datasheet - Page 16

• Manufacturer Part Number: NS32FX164AV-25
• Description: IC IMAGING COMM SGNL PROC PLCC68
• Manufacturer: National Semiconductor

Specifications of NS32FX164AV-25

• Processor Type: Advanced Imaging/Communications Signal Processor SIAP™
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NS32FX164AV-25; Q1284286

2 0 Architectural Description
2 4 3 Instruction Set Summary
Table 2-2 presents a brief description of the NS32FX164
instruction set The Format column refers to the Instruction
Format tables (Appendix A) The Instruction column gives
the instruction as coded in assembly language and the De-
scription column provides a short description of the function
provided by that instruction Further details of the exact op-
erations performed by each instruction may be found in the
Series 32000 Instruction Set Reference Manual and the
NS32CG16 Printer Display Processor Programmer’s Refer-
ence
Notations
i
f
MOVES
INTEGER ARITHMETIC
PACKED DECIMAL (BCD) ARITHMETIC
e
e
Integer length suffix B
Floating Point length suffix F
Format
Format
Format
4
2
7
7
7
7
7
4
4
2
4
4
4
6
6
7
7
7
7
7
7
7
6
6
Operation
MOVi
MOVQi
MOVMi
MOVZBW
MOVZiD
MOVXBW
MOVXiD
ADDR
Operation
ADDi
ADDQi
ADDCi
SUBi
SUBCi
NEGi
ABSi
MULi
QUOi
REMi
DIVi
MODi
MEIi
DEIi
Operation
ADDPi
SUBPi
W
D
e
e
e
Byte
Word
Double Word
L
e
e
Standard Floating
Long Floating
Operands
gen gen
short gen
gen gen disp
gen gen
gen gen
gen gen
gen gen
gen gen
Operands
gen gen
short gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
gen gen
Operands
gen gen
gen gen
TABLE 2-2 NS32FX164 Instruction Set Summary
(Continued)
Description
Move a value
Extend and move a signed 4-bit constant
Move multiple disp bytes (1 to 16)
Move with zero extension
Move with zero extension
Move with sign extension
Move with sign extension
Move effective address
Description
Add
Add signed 4-bit constant
Add with carry
Subtract
Subtract with carry (borrow)
Negate (2’s complement)
Take absolute value
Multiply
Divide rounding toward zero
Remainder from QUO
Divide rounding down
Remainder from DIV (Modulus)
Multiply to extended integer
Divide extended integer
Description
Add packed
Subtract packed
16
gen
fied
short
(see Appendix A for encodings)
imm
after any addressing extensions
disp
All three lengths legal
reg
areg
MOD PSR US (bottom 8 PSR bits)
cond
the Basic Instruction (see Appendix A for encodings)
e
e
e
e
e
e
e
Any General Purpose Register R0– R7
General operand Any addressing mode can be speci-
Implied immediate operand An 8-bit value appended
Displacement (addressing constant) 8 16 or 32 bits
Any Processor Register SP SB FP INTBASE
A 4-bit value encoded within the Basic Instruction
Any condition code encoded as a 4-bit field within