NS32FX164AV-25 National Semiconductor, NS32FX164AV-25 Datasheet - Page 46

• Manufacturer Part Number: NS32FX164AV-25
• Description: IC IMAGING COMM SGNL PROC PLCC68
• Manufacturer: National Semiconductor

Specifications of NS32FX164AV-25

• Processor Type: Advanced Imaging/Communications Signal Processor SIAP™
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NS32FX164AV-25; Q1284286

3 0 Functional Description
SXH Store X Vector Pointer Higher Half
The SXH instruction stores the contents of the higher-half of
the X register into the word at mem addr
Syntax
SXH addr
Operation
Note Accumulator is not affected
SY Store Y Vector Pointer
The SY instruction stores the contents of the Y register into
the double-word at aligned addr
Syntax
SY aligned addr
Operation
Note Accumulator is not affected
SZ Store Z Vector Pointer
The SZ instruction stores the contents of the Z register into
the double-word at aligned addr
Syntax
SZ aligned addr
Operation
Note Accumulator is not affected
SA Store Accumulator
The SA instruction stores the contents of the A accumulator
as a complex value into mem aligned addr
Syntax
SA aligned addr
Operation
Notes Bits 15 through 30 of the real and imaginary parts of the accumulator
15
15
15
15
mem aligned addr
(vector ptr) mem aligned addr
(vector pointer mem aligned addr
(complex mem aligned addr
are placed in the real and imaginary parts of the complex value at
mem aligned addr
Accumulator is not affected
11101
01011
01100
01101
11 10
11 10
11 10
11 10
X high
aligned addr
aligned addr
aligned addr
(complex) A
addr
(Continued)
Y
Z
0
0
0
0
46
addr
SEA Store Extended Accumulator
The SEA stores the contents of bits 0– 30 of the imaginary
accumulator as an extended value into a DSPM memory
location specified by Z 0
Bit 0 of this memory location is loaded with ‘‘0’’
Syntax
EXEC SEA
Operation
Z 0
Note Accumulator is not affected
SREPEAT Store Repeat Register
The SREPEAT instruction stores the contents of the
REPEAT register in the double-word at mem aligned
Syntax
SREPEAT aligned addr
Operation
Note Accumulator is not affected
SOVF Store and Clear OVF Register
The SOVF instruction stores the contents of the OVF regis-
ter in the word at mem addr
cleared to ‘‘0’’
Syntax
SOVF addr
Operation
Note Accumulator is not affected
3 4 5 6 Adjust Register Instructions
INCX Increment X Vector Pointer
The INCX instruction increments the X vector pointer by one
element according to the increment and the wrap
Syntax
EXEC INCX
15
15
15
15
extended Z
(repeat reg) mem aligned addr
(ovf reg) mem aligned addr
(extended) A
10000
01110
01001
10000
11 10
11 10
11 10
11 10
The OVF register is then
101 0011 0110
100 0101 1001
aligned addr
addr
OVF
REPEAT
0
0
0
0