ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 70

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

8111C–MCU Wireless–09/09
Section 7.2.3 “RX_AACK_ON - Receive with Automatic ACK” on page 51
“TX_ARET_ON - Transmit with Automatic Retry and CSMA-CA Retry” on page
Table 7-16.
Notes:
TX_ARET
RX_AACK
• Bit [4:0] - TRX_CMD
A write access to register bits TRX_CMD initiate a radio transceiver state transition:
Table 7-17.
SUCCESS_DATA_PENDING:
SUCCESS_WAIT_FOR_ACK:
Register Bits
TRAC_STATUS
Register Bit
TRX_CMD
1. Even though the reset value for register bits TRAC_STATUS is 0, the RX_AACK and
TX_ARET procedures set the register bits to TRAC_STATUS = 7 (INVALID) when it is started.
TRAC_STATUS Transaction Status
State Control Register
Value
0
7
1
2
3
5
(1)
(1)
0x04
Description
SUCCESS
SUCCESS_DATA_PENDING
SUCCESS_WAIT_FOR_ACK
CHANNEL_ACCESS_FAILURE
NO_ACK
INVALID
All other values are reserved
Value
0x00
0x02
0x03
0x06
0x08
0x09
0x16
0x19
(1)(2)
Indicates a successful reception of an ACK frame with
frame pending bit set to 1.
Indicates an ACK frame is about to sent in RX_AACK
slotted
operation
SLOTTED_OPERATION (register 0x2C, XAH_XTRL_0).
The microcontroller must pulse pin 11 (SLP_TR) at the next
back-off slot boundary in order to initiate a transmission of
the ACK frame. For details refer to IEEE 802.15.4-2006,
section 7.5.6.4.2.
State Description
NOP
TX_START
FORCE_TRX_OFF
FORCE_PLL_ON
RX_ON
TRX_OFF (CLK Mode)
PLL_ON (TX_ON)
RX_AACK_ON
TX_ARET_ON
All other values are reserved and mapped to NOP
acknowledgement.
must
be
enabled
RX_AACK
Slotted
X
X
X
with
AT86RF231
acknowledgement
and
64.
register
TX_ARET
Section 7.2.4
X
X
X
X
X
bit
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