LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 16

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Watchdog Timer ........................................................................................................................... 331
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Analog-to-Digital Converter (ADC) ............................................................................................. 354
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
16
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 320
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 321
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 323
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 324
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 325
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 326
GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 327
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 328
GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 329
GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 330
Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 334
Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 335
Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 336
Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 337
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 338
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 339
Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 340
Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 341
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 342
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 343
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 344
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 345
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 346
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 347
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 348
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 349
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 350
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 351
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 352
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 353
ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ............................................. 362
ADC Raw Interrupt Status (ADCRIS), offset 0x004 ........................................................... 363
ADC Interrupt Mask (ADCIM), offset 0x008 ..................................................................... 364
ADC Interrupt Status and Clear (ADCISC), offset 0x00C .................................................. 365
ADC Overflow Status (ADCOSTAT), offset 0x010 ............................................................ 366
ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ................................................. 367
ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 370
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 371
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 372
ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 373
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 374
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 376
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 379
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 379
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 379
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 379
Preliminary
June 02, 2008