LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 582

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LM3S3768

Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
Reset
Type
Univeral Serial Bus (USB) Controller
USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS)
Base 0x4005.0000
Offset 0x340
Type R/W, reset 0x0000
582
Host
Device
Bit/Field
15:4
RO
3
2
1
0
15
0
RO
Register 87: USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS),
offset 0x340
USBRXDPKTBUFDIS is a 16-bit register that indicates which of the receive endpoints have disabled
the double-packet buffer functionality (see the section called “Double-Packet Buffering” on page 506).
Note:
14
0
RO
13
reserved
reserved
0
Name
Bits relating to endpoints that have not been configured may be asserted by writing a 1 to
their respective register; however the disable bit will have no observable effect.
EP3
EP2
EP1
RO
12
0
RO
11
0
Type
R/W
R/W
R/W
RO
RO
RO
10
0
reserved
RO
Reset
0x00
9
0
0
0
0
0
Preliminary
RO
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EP3 RX Double-Packet Buffer Disable
EP2 RX Double-Packet Buffer Disable
EP1 RX Double-Packet Buffer Disable
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
7
0
RO
6
0
RO
5
0
RO
4
0
EP3
R/W
3
0
R/W
EP2
2
0
EP1
R/W
1
0
June 02, 2008
reserved
RO
0
0

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