LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 440

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Synchronous Serial Interface (SSI)
15.4
Table 15-1. SSI Register Map
440
0xFDC
Offset
0x00C
0x01C
0xFD0
0xFD4
0xFD8
0xFE0
0xFE4
0xFE8
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
Name
SSICR0
SSICR1
SSIDR
SSISR
SSICPSR
SSIIM
SSIRIS
SSIMIS
SSIICR
SSIDMACTL
SSIPeriphID4
SSIPeriphID5
SSIPeriphID6
SSIPeriphID7
SSIPeriphID0
SSIPeriphID1
SSIPeriphID2
The configuration sequence would be as follows:
1.
2.
3.
4.
5.
Register Map
Table 15-1 on page 440 lists the SSI registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that SSI module’s base address:
■
■
Note:
SSI0: 0x4000.8000
SSI1: 0x4000.9000
Ensure that the SSE bit in the SSICR1 register is disabled.
Write the SSICR1 register with a value of 0x0000.0000.
Write the SSICPSR register with a value of 0x0000.0002.
Write the SSICR0 register with a value of 0x0000.09C7.
The SSI is then enabled by setting the SSE bit in the SSICR1 register to 1.
The SSI must be disabled (see the SSE bit in the SSICR1 register) before any of the control
registers are reprogrammed.
Type
W1C
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0003
0x0000.0000
0x0000.0000
0x0000.0008
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0022
0x0000.0000
0x0000.0018
Reset
Preliminary
Description
SSI Control 0
SSI Control 1
SSI Data
SSI Status
SSI Clock Prescale
SSI Interrupt Mask
SSI Raw Interrupt Status
SSI Masked Interrupt Status
SSI Interrupt Clear
SSI DMA Control
SSI Peripheral Identification 4
SSI Peripheral Identification 5
SSI Peripheral Identification 6
SSI Peripheral Identification 7
SSI Peripheral Identification 0
SSI Peripheral Identification 1
SSI Peripheral Identification 2
June 02, 2008
page
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